Network-on-Chip Topology Generation via Clock Domain Assignment
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Solution Overview
Problem
Network-on-Chip (NoC) synthesis faces challenges in designing balanced topologies that minimize interference between input ports and optimize performance, particularly due to issues like Head-of-Line (HoL) blocking and variable traffic patterns, without relying on end-to-end Quality of Service (QoS) enforcement or local credit-based arbitration.
Innovation Solution
A computer-based method for synthesizing NoC that assigns clock domains to routers based on minimum frequency requirements and balances traffic flows, generating a balanced topology without end-to-end fairness or local credit-based arbitration, by identifying routers with shared output ports, calculating minimum frequencies, and adjusting clock domains to reduce transitions and packet rate imbalances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a NoC topology is designed to accommodate variable traffic patterns and burstiness, then performance requirements can be met, but complexity of arbitration schemes and QoS enforcement increases
Solution Approach 1:
The patent changes the fundamental parameter of traffic handling by transforming variable-rate traffic into constant-rate traffic through rate smoothing mechanisms. This allows the NoC to operate with simplified arbitration schemes that assume uniform traffic patterns, thereby reducing complexity while maintaining performance under variable traffic conditions.
Solution Approach 2:
The patent applies preliminary rate smoothing and traffic shaping at the ingress points before traffic enters the core NoC fabric. By pre-regulating traffic rates and patterns upstream, the system eliminates the need for complex real-time arbitration and QoS enforcement within the NoC routers themselves.
2Reliability
If end-to-end QoS enforcement and local credit-based arbitration are implemented, then performance can be maintained under variable traffic, but device complexity and overhead increase
Solution Approach 1:
The patent extracts the QoS enforcement and arbitration complexity from the NoC core routers and places it at the network edge through rate smoothing mechanisms. This separation allows the NoC interior to operate with simple, fixed-rate assumptions while still guaranteeing performance consistency for variable traffic sources.
Solution Approach 2:
The system implements self-service rate smoothing where traffic sources regulate their own output rates based on configured parameters, eliminating the need for centralized QoS control or credit-based arbitration within the NoC. Each source independently manages its traffic to prevent congestion without requiring complex coordination.
3Stability of the object's composition
If rate smoothing is applied at the network level, then constant-rate traffic can be achieved from variable-rate sources, but additional components and complexity are introduced
Solution Approach 1:
The patent implements rate smoothing using universal buffer structures that can handle multiple traffic types and patterns through a single mechanism. The same buffer architecture serves both as traffic regulation and as a simple arbitration element, reducing overall system complexity despite the added rate smoothing functionality.
Data Source
AI summary
The present disclosure provides computer-based methods and a system for synthesizing a NoC that advantageously generate balanced NoC topologies without end-to-end fairness or local credit-based arbitration, and improve NoC performance when destination device bridge ports support only one incoming physical link per channel. More particularly, a clock domain is assigned to certain routers that satisfies the minimum frequency for the router while reducing clock domain transitions to neighboring routers, and the traffic flows received by these routers are balanced based on the traffic flow packet rates.