Network-on-Chip Deadlock-Free Clustering Transformation
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Solution Overview
Problem
Designing a network-on-chip (NoC) that minimizes resource usage while ensuring a cycle-free topology, adhering to physical constraints and avoiding deadlocks, is challenging due to the need for optimizing connectivity mapping and reducing wiring and logic elements without introducing new cycles.
Innovation Solution
The method involves applying clustering to nodes and edges to transform the network into a near-optimal, cycle-free structure that honors physical constraints, using edge and node clustering to minimize resource usage and maintain connectivity, and applying a physical roadmap approach for optimal results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If connectivity mapping is optimized to reduce wiring and logic elements, then resource usage is minimized, but the risk of introducing new cycles that cause deadlocks increases
Solution Approach 1:
The patent applies dynamic cycle detection and prevention mechanisms during the connectivity mapping optimization process. The system continuously monitors the network topology changes and adjusts the mapping dynamically to prevent cycle formation while minimizing resource usage, rather than using static optimization methods.
Solution Approach 2:
The patent implements feedback mechanisms that detect potential cycle formation during connectivity mapping optimization. When a cycle is detected or predicted, the system provides feedback to adjust the mapping configuration to eliminate the cycle while maintaining optimization goals, ensuring deadlock-free operation.
2Device complexity
If network transformation reduces the number of wires and switches, then device complexity is reduced, but maintaining cycle-free topology becomes more difficult
Solution Approach 1:
The patent applies preliminary cycle detection and prevention actions before completing the network transformation. By detecting potential cycles early in the transformation process and preventing them proactively, the system maintains cycle-free topology even as device complexity is reduced through fewer wires and switches.
Solution Approach 2:
The patent introduces intermediary mechanisms such as virtual channels and buffering structures that mediate between reduced physical network resources and the requirement for cycle-free operation. These intermediaries help maintain topology integrity without requiring complex detection and correction mechanisms.
3Quantity of substance
If clustering is applied to transform network topology, then resource usage is optimized, but the runtime complexity of the transformation process increases
Solution Approach 1:
The patent segments the network clustering transformation process into smaller, manageable stages that can be executed incrementally. By dividing the overall transformation into discrete steps with intermediate validation points, the system optimizes resource usage through clustering while controlling runtime complexity through structured progression.
Solution Approach 2:
The patent applies partial clustering actions that focus on high-impact, low-complexity transformations first. Rather than attempting complete network clustering simultaneously, the system applies clustering selectively to critical network segments, achieving significant resource optimization with reduced runtime overhead.
Data Source
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AI summary
System and methods are disclosed for transformation of a network, such as a network-on-chip (NoC). The system applies a method of clustering to nodes and edges. The clustering transforms the network and produces a deadlock free and (near-)optimal network that honors the constraints of the input network's floorplan and specification.