Network-on-Chip Router Virtual Channel Allocation
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Solution Overview
Problem
Large-scale Network on a Chip (NoC) designs face challenges in congestion handling, particularly due to head-of-the-line blocking, which reduces system performance, and require efficient routing and buffer management to maintain high throughput while minimizing area and power consumption.
Innovation Solution
The proposed solution involves a cost-efficient router implementation with hierarchical virtual channel credit management and partially adaptive routing, using XY or YX routing schemes, and separating virtual networks for different transaction levels to optimize physical channel utilization and reduce latency, allowing for dynamic load balancing and deadlock-free operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If virtual channels based router design is used to eliminate head-of-the-line blocking, then channel utilization and throughput are improved, but area overhead and power consumption increase significantly
Solution Approach 1:
The router buffers are segmented into multiple virtual channels, where each virtual channel has its own buffer space. This segmentation allows simultaneous transmission of multiple packets destined for different outputs, eliminating head-of-the-line blocking while maintaining manageable buffer sizes per virtual channel rather than requiring one large buffer per physical channel.
Solution Approach 2:
The patent introduces a virtual channel dimension overlaying the physical channel structure. By adding this logical layer, multiple virtual channels can share the same physical channel resources through time-multiplexing, effectively increasing channel utilization without proportionally increasing physical buffer area.
2Productivity
If virtual channels based router design is used to eliminate head-of-the-line blocking, then throughput is improved, but power consumption increases significantly
Solution Approach 1:
The arbitration mechanism dynamically selects which virtual channel gets access to the physical channel based on current traffic conditions and buffer status. This dynamic allocation ensures that power is consumed only when data is actually being transmitted, rather than maintaining constant readiness across all virtual channels, thus improving throughput efficiency while controlling power consumption.
Solution Approach 2:
Each virtual channel independently manages its own buffer and can autonomously request transmission when its buffer contains data. This self-service approach reduces the complexity and power consumption of centralized control logic, as each virtual channel essentially arbitrates for itself based on its own needs rather than requiring continuous polling by a central controller.
3Device complexity
If single buffer per input channel is used to simplify router design and save area, then device complexity is reduced, but head-of-the-line blocking occurs reducing channel utilization
Solution Approach 1:
Multiple virtual channel buffers are merged into a single physical channel interface. The arbitration logic combines the status of all virtual channel buffers and selects the highest priority one for transmission, effectively merging multiple buffering functions into a unified output interface that maintains low complexity while avoiding head-of-the-line blocking.
Data Source
AI summary
There may be provided a method for traffic control in a network on chip (NOC), the method may include receiving, by input interface units of the NOC, flow control units destined to output interface units of the NOC; wherein multiple routing paths span between the input interface units and the output interface units; wherein at least some of the routing paths are formed by multiple routers of a grid of routers of the NOC and have a single turning point; allocating virtual channels to the flow control units, wherein an allocating of a virtual channel to a flow control unit (FCU) is based on a type of a transaction associated with the FCU and on a location of the single turning point; and routing the flow control units, based on the virtual channels allocated to the FCUs, between the input interface units and the output interface units.