NoC Packet Routing With Virtual Channels and Dynamic Buffers
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Solution Overview
Problem
Existing Network-on-Chip (NoC) technologies face issues with slow data transfer due to wide interfaces being packetized through narrower interfaces, lack of prioritization routing, and inefficient utilization of virtual channels, leading to congestion and reduced system performance.
Innovation Solution
A computer-implemented method for data transmission in NoC that utilizes dynamically allocated buffers, virtual channels with priority routing, and linked-list managed flit buffers to maintain sequence and prioritize flits, along with flit assemblers and splitters for efficient packetization and routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional bus architecture is used for data transferring in System-on-Chip, then the structure is simple and easy to implement, but the data transfer becomes blocked and capacitance increases causing performance degradation
Solution Approach 1:
The patent divides the traditional bus architecture into a network of multiple independent channels with routers. Data is segmented into flits (flow control digits) that can be independently routed through different paths, eliminating the single-point bottleneck of traditional bus structures and enabling parallel data transfer.
Solution Approach 2:
The patent transitions from a one-dimensional bus structure to a multi-dimensional network topology with multiple routing dimensions. Data can traverse through different spatial paths and virtual channels, adding dimensional freedom to data flow and eliminating blocking issues inherent in linear bus architectures.
2Productivity
If Network-on-Chip packetization is implemented to improve data transfer performance, then data latency and congestion are reduced, but blocked traffic occurs due to inability to prioritize packetized data
Solution Approach 1:
The patent implements dynamic priority assignment and adaptive routing for packetized data. The system can dynamically adjust packet priorities based on traffic conditions, application requirements, and resource availability, allowing critical data to be prioritized and preventing blocking by implementing flexible traffic management rather than static FIFO queuing.
Solution Approach 2:
The patent introduces virtual channels as intermediary layers between physical channels and data packets. These virtual channels act as mediators that can independently manage different data flows, providing priority handling and preventing blocking by allowing out-of-order packet transmission and reassembly at destination.
3Productivity
If multiple virtual channels are used to improve NoC performance, then data throughput increases, but system complexity increases due to management overhead
Solution Approach 1:
The patent designs virtual channels with universal management mechanisms that can handle multiple functions through standardized interfaces. The same virtual channel infrastructure supports different QoS requirements, routing algorithms, and traffic types, reducing complexity by avoiding separate management systems for each function while maintaining high throughput.
Solution Approach 2:
The patent manages virtual channel complexity by dynamically adjusting parameters such as buffer sizes, priority levels, and allocation policies based on traffic conditions. This parameter-based control allows the system to optimize throughput while adapting complexity to actual needs rather than maintaining maximum complexity permanently.
4Adaptability or versatility
If wider interfaces are packetized and transferred through narrower interfaces in NoC, then data can be transmitted through available channels, but data transfer speed decreases
Solution Approach 1:
The patent employs periodic batching and aggregation mechanisms where data from wider interfaces is collected over multiple cycles and transmitted efficiently through narrower channels. By using credit-based flow control and periodic transmission windows, the system minimizes the speed penalty while maintaining compatibility between different interface widths.
Solution Approach 2:
The patent implements overlapping transmission and processing operations to maintain continuous data flow. While some data is being transmitted through narrower interfaces, other operations such as packetization, routing decisions, and buffer management occur in parallel, ensuring that the system operates continuously at optimal speed rather than idle during interface conversion.
Data Source
AI summary
The present invention discloses a computer-implemented method of data transmission for a Network-on-Chip to allow high performance routing through dynamic allocated buffer. The method comprises the steps of transferring command or data in a form of plurality of flits from a source node to a router and further to a destination node, and transmitting the flits from the destination node back to the router, wherein the flits are packetized for transmission according to channel width and transaction width, sequence, and priority routing through physical and virtual channels.