Network-on-Chip Switch Routing via Direction Determinator
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current routing algorithms in network-on-chip (NoC) systems require large routing tables that increase in size and complexity with the number of switches, leading to inefficiencies such as increased memory requirements and power consumption, and lack flexibility in correcting misdirected data packets.
Innovation Solution
A switch design that determines future direction information using location and destination coordinates, prioritizing longer output links over shorter ones, and employs logic-based distributed routing to select output paths, reducing the need for extensive routing tables and improving connectivity in both regular and irregular topologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If routing tables are used to store routes to every possible destination, then routing information is complete and accurate, but the size of routing tables increases exponentially with network complexity
Solution Approach 1:
The routing table is segmented into multiple pages, where each page stores routing information for a specific range of destination addresses. This allows the routing table to be divided into manageable chunks rather than storing all routes in a single large structure, reducing the memory access complexity and allowing for more efficient cache utilization.
Solution Approach 2:
The patent introduces a hierarchical dimension to routing table organization by implementing a page-based structure with index levels. Instead of a flat single-dimensional routing table, the system uses multi-level indexing (L0, L1, L2 pages) that adds dimensional organization, allowing routing information to be accessed through a tree-like structure rather than linear search through all entries.
2Productivity
If the number of switches increases to handle larger networks, then network capacity increases, but the number of hops and header length increase exponentially
Solution Approach 1:
The routing header is segmented into multiple fields rather than using a single long field. Each field corresponds to a specific page level in the routing table hierarchy, allowing the header to be broken into manageable segments that can be processed independently at each switch level, reducing the complexity of header manipulation.
Solution Approach 2:
The routing header is pre-configured with page level information and destination address segments before the packet enters the network. This preliminary organization of routing information allows switches to quickly determine the appropriate routing path without performing complex calculations or accessing large routing tables during packet forwarding.
3Adaptability or versatility
If large routing tables are implemented to cover all destinations, then routing coverage is complete, but silicon area and power consumption increase
Solution Approach 1:
The routing table is divided into multiple smaller pages distributed across different memory locations or cache levels. This segmentation allows the system to store complete routing information without requiring a single large contiguous memory block, reducing the peak silicon area requirement and enabling more efficient use of available memory resources.
Solution Approach 2:
The routing table structure implements a nested hierarchy where L2 pages contain L1 pages, which in turn contain L0 pages. This nested organization allows the system to store complete routing information in a compact hierarchical structure that can be efficiently cached and accessed, reducing the overall silicon area required compared to flat storage structures.
Data Source
AI summary
A switch includes at least one input configured to receive data and at least two outputs configured to send data to at least two further switches in a network via at least two output links. Each output link has a known hop value. The switch further includes a direction determinator that determines a routing direction for the data from information identifying a relative location of the switch in the network and information identifying a destination of said data. A distributor within the switch processes the routing direction and direction information about each output link in order to select one of said at least two outputs for outputting said data. The selection that is made prioritizes output links for selection which have relatively higher known hop values.