NoC Topology Analysis for External Dependency Deadlocks

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Solution Overview

Problem

Network-on-chip (NoC) systems face potential deadlocks due to external dependencies, leading to stalled data packets and system resets, which are undesirable.

Innovation Solution

A method for detecting and resolving potential deadlocks during the design phase by modifying the NoC topology to break external dependencies, using software tools to analyze and modify the network architecture before implementation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If external dependencies are introduced in NoC topology to enable data flow between initiators and targets, then communication functionality is improved, but deadlock risk increases

Engineering Contradiction:

Improvecommunication functionalityVSAvoiddeadlock risk

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by detecting potential deadlocks during the design phase before the NoC is implemented. The method analyzes the proposed topology and identifies external dependencies that could cause deadlocks, allowing designers to resolve these issues beforehand through topology modification or dependency removal, thus preventing deadlocks from occurring in the actual system operation.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If system reset is used to resolve deadlock, then data packets can make progress, but system reliability and operational continuity deteriorate

Engineering Contradiction:

Improvedata packet progressVSAvoidsystem operational continuity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by taking preventive measures against deadlocks during the design phase. By detecting potential deadlock conditions and modifying the topology or removing problematic external dependencies before implementation, the system eliminates the need for reset operations during runtime, thereby maintaining both data packet progress and system operational continuity without relying on disruptive reset mechanisms.

Inventive Principle:

Principle #9Preliminary anti-action

3Reliability

If NoC topology is modified to resolve deadlock, then deadlock prevention is improved, but design complexity increases

Engineering Contradiction:

Improvedeadlock preventionVSAvoiddesign complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies feedback by implementing a detection and analysis mechanism that provides information about potential deadlock conditions in the NoC topology. The method analyzes the topology structure and external dependencies, feeds back identified issues to the designer, and enables iterative refinement of the topology to resolve deadlocks while maintaining design simplicity through automated analysis tools.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS12438829B2System and method for deadlock detection in network-on-chip (NoC) having external dependencies

Publication Date: 2025.10.07 ARTERIS INC

AI summary

Design of a network-on-chip (NoC) includes searching for a potential deadlock in a topology of the NoC, where the potential deadlock is caused by an external dependency in which input of data into the NoC is dependent on output of data from the NoC. The NoC design further includes modifying the NoC topology to resolve the potential deadlock.