No-Code Power Management Controller for SoC RTL Generation
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Solution Overview
Problem
The traditional power and clock design process for system-on-chip (SoC) is inefficient and time-consuming due to the need for multiple stakeholders to repeat tasks and redesign when changes occur, as each stage requires different types of information, leading to significant time and manpower consumption.
Innovation Solution
A no-code approach for designing a power management controller that automatically generates register transfer level (RTL) code based on power design settings, using a system that includes a memory to store instructions, power manager components, and processors to execute these instructions, generating hardware and register code for power management controllers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional multi-stage power design process is used with manual coding, then design flexibility and stakeholder collaboration are improved, but time consumption and productivity deteriorate significantly
Solution Approach 1:
The system enables self-service by automatically generating RTL code, UPF files, and documentation from power domain specifications without requiring manual coding. The automated code generator transforms high-level power management requirements into implementation-ready code, eliminating the need for developers to manually write and maintain code across multiple design stages.
Solution Approach 2:
The system performs preliminary action by pre-defining power manager components, power domains, and their relationships in a configurable interface before code generation. This allows design decisions to be made and validated upfront, with the system automatically generating all necessary code artifacts, thereby preventing the need for repeated redesign cycles.
2Manufacturing precision
If manual Verilog coding is performed for each design stage, then customization and precision are improved, but ease of manufacture and complexity increase
Solution Approach 1:
The system uses copying by providing pre-defined, reusable power manager component templates that can be instantiated multiple times with different configurations. Instead of manually coding each power management module from scratch, developers can copy and adapt standardized components, maintaining design precision while significantly reducing implementation effort and complexity.
Solution Approach 2:
The system implements universality by creating a unified configuration interface and code generation framework that handles multiple design stages (RTL code, UPF files, documentation) simultaneously. A single configuration set generates all necessary artifacts, eliminating the need for separate manual coding processes for each design stage while maintaining consistent precision across all outputs.
3Reliability
If design changes are made during later stages, then reliability and verification are improved, but time loss and productivity worsen due to repeated redesign
Solution Approach 1:
The system implements dynamics by allowing configuration parameters to be modified at any stage before final code generation. The configurable interface enables dynamic adjustment of power domain settings, manager configurations, and operational parameters, with the system automatically regenerating all code artifacts to reflect changes, thereby maintaining verification accuracy without incurring repeated manual redesign time.
Solution Approach 2:
The system uses feedback by providing automated verification and validation of configuration parameters before code generation. The system checks for consistency and correctness of power management specifications, providing immediate feedback on potential issues before they propagate to the generated code, thus ensuring reliability while preventing time-consuming redesign cycles later in the process.
Data Source
AI summary
Disclosed are a system and method for designing a power management controller that performs power control of a plurality of power domains in a system-on-chip (SoC) device using a no-code approach. The system comprises a memory configured to store instructions and a processor configured to execute the instructions. The instructions include operations for generating a root power manager instance based on a root power manager component, generating at least one domain power manager instance based on one or more domain power manager components, establishing connections between output ports of the root power manager instance and input ports of the domain power manager instances, allocating memory storage space for each power manager instance, and generating hardware code of power elements, register code corresponding to the power elements, hardware code corresponding to ports and connections, and binary code corresponding to an operation sequence of the power management controller.