Node Pointer Sets Prevent Failure Propagation in Multi-Node Systems

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Solution Overview

Problem

In multi-node information processing systems, failures in nodes caching write pointers can propagate, leading to data transmission failures due to outdated write pointer values not being shared among nodes, causing system instability and process interruptions.

Innovation Solution

An information processing apparatus with nodes that store multiple pointer sets, including write and read pointers, and a notification mechanism to retain data using the write pointer indicated by a pointer identifier, allowing nodes to independently manage and update pointer values without caching, thus preventing failure propagation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If nodes cache write pointer values locally for fast access, then data transmission speed is improved, but system reliability deteriorates because failure propagation occurs when cached values become outdated

Engineering Contradiction:
Improvedata transmission speedVSAvoidsystem reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent extracts the write pointer value from the shared memory location and places it in a notification register that is directly accessible by receiving nodes. This extraction eliminates the need for nodes to repeatedly access shared memory or cache values, providing both fast access (improving speed) and centralized control (improving reliability by preventing failure propagation).

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The notification register acts as an intermediary between the shared memory and the receiving nodes. Instead of nodes directly caching values from shared memory (which causes reliability issues when values become outdated), the notification register mediates by providing a single source of truth that all nodes can access without caching, thus maintaining both speed and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If nodes independently manage pointer values without centralized notification, then operational autonomy is improved, but data integrity deteriorates due to outdated pointer values causing transmission failures

Engineering Contradiction:
Improveoperational autonomyVSAvoiddata integrity
Core Design Contradiction:
Ease of operationVSLoss of information

Solution Approach 1:

The notification register provides a feedback mechanism where receiving nodes can always obtain the current write pointer value from a centralized location. This feedback ensures data integrity (preventing loss of information) while maintaining operational autonomy because nodes can independently query the notification register whenever needed without interfering with each other's operations.

Inventive Principle:
Principle #23Feedback

3Productivity

If multiple nodes access shared memory simultaneously for pointer updates, then system throughput is improved, but stability deteriorates due to race conditions and outdated values

Engineering Contradiction:
Improvesystem throughputVSAvoidsystem stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The notification register serves as an intermediary that all nodes access for pointer values. This eliminates race conditions because there is no simultaneous writing to a shared location - instead, each node independently reads from the notification register which is updated by the transmitting node. This maintains system stability while allowing high throughput as multiple nodes can simultaneously read from the notification register without conflict.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9003082B2Information processing apparatus, arithmetic device, and information transferring method
Publication Date: 2015.04.07 FUJITSU LTD
  • US9003082B2 patent drawing
  • US9003082B2 patent drawing
  • US9003082B2 patent drawing

AI summary

An information processing apparatus including a plurality of nodes. The each of the nodes comprises a processor, a storage device, and a storing unit that stores therein multiple pointer sets in each of which a write pointer indicating an address used when data received from another node is stored in the storage device is associated with a read pointer indicating an address used when the data is read from the storage device. The each of the nodes comprises a notifying unit that notifies a node corresponding to a transmission source of the data of a pointer identifier that indicates a pointer set. The each of the nodes comprises a retaining unit that retains the received data in the storage device in accordance with an address indicated by a write pointer in a pointer set indicated by the pointer identifier.