Node-Port Betweenness Centrality for Wafer Transport Bottlenecks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing methods for calculating betweenness centrality (BC) in semiconductor wafer manufacturing processes do not adequately consider the role of ports in node-port structures, leading to inaccurate identification of bottlenecks and congestion in railway networks used for transporting wafers.

Innovation Solution

An electronic device and method that calculates BC by considering both nodes and ports in a node-port structure, using a shortest path calculation algorithm to determine port connectivity and pair-dependency values, reducing time and space complexity through recursive accumulation of pair-dependency values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If existing BC calculation methods are used in node structures, then calculation is simpler, but accuracy of bottleneck identification is insufficient

Engineering Contradiction:
Improvebottleneck identification accuracyVSAvoidcalculation structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the network structure into nodes and ports as separate entities. Ports are treated as distinct elements with their own BC values, while nodes also have BC values. This segmentation allows the calculation to capture the specific role of ports in congestion, improving bottleneck identification accuracy without overwhelming complexity through modular calculation approaches.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If ports are considered in BC calculation, then congestion analysis accuracy improves, but calculation time increases

Engineering Contradiction:
Improvecongestion analysis accuracyVSAvoidcalculation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by pre-calculating shortest path information and storing it for later use. The betweenness centrality values for ports are calculated and stored, which can then be reused in congestion analysis without recalculation. This preliminary computation reduces the time required for actual congestion analysis while maintaining high accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The calculation method uses the structural information of the node-port structure itself to guide the BC calculation. The algorithm leverages the inherent properties of the network topology and port connectivity to efficiently compute BC values without requiring external complex computational resources, enabling the system to serve its own analysis needs efficiently.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If ports are considered in BC calculation, then congestion analysis accuracy improves, but space complexity increases

Engineering Contradiction:
Improvecongestion analysis accuracyVSAvoidstorage space
Core Design Contradiction:
Measurement precisionVSVolume of stationary object

Solution Approach 1:

The patent creates a universal data structure and calculation framework that handles both nodes and ports within a single BC calculation system. This multi-functional approach allows the same computational framework to process different elements (nodes and ports) uniformly, improving congestion analysis accuracy while avoiding the need for separate storage systems that would increase space complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250355941A1Electronic device and operation method thereof
Publication Date: 2025.11.20 SAMSUNG ELECTRONICS CO LTD
  • US20250355941A1 patent drawing
  • US20250355941A1 patent drawing
  • US20250355941A1 patent drawing

AI summary

An electronic device includes at least one memory and at least one processor configured to execute at least one instruction stored in the at least one memory. The at least one processor, by executing the at least one instruction, may output a first shortest path number, defined by a source node, a pass node, and a target node among a plurality of nodes to which a plurality of ports are connected, and a second shortest path number, defined by the source node and the target node, and calculate a first betweenness centrality (BC) value for the plurality of nodes based on summing first pair-dependency values for respective pairs of the source node and the target node. A first pair-dependency value is defined as a product of a second pair-dependency value, a number of ports connected to the source node, and a number of ports connected to the target node.