Sampled Node Voltage Refresh for Low-Power Analog Bias Control
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Solution Overview
Problem
Analog circuitry in mixed signal integrated circuits consumes more power due to linearity requirements, leading to increased power consumption and limited battery life in battery-powered devices, particularly in IoT applications, where existing digital domain power reduction techniques are not applicable.
Innovation Solution
A method and circuit portion that control an analog voltage supply module by applying a bias voltage, sampling, storing, disabling, and refreshing the voltage at a node based on refresh criteria, using a digital control module synchronized with a clock to reduce active time and power consumption of analog circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If analog circuitry operates continuously to maintain linearity requirements, then voltage stability is improved, but power consumption increases
Solution Approach 1:
The patent implements periodic action by sampling the analog voltage at specific clock edges and periodically refreshing it based on refresh criteria, rather than continuously powering the analog circuitry. This allows the system to maintain voltage stability only when necessary while consuming minimal power during idle periods.
Solution Approach 2:
The system employs self-service through automatic refresh mechanisms that monitor voltage levels and trigger refresh operations when degradation is detected. The digital control module autonomously manages the sampling, storage, and refresh of analog voltages without requiring continuous analog power supply.
2Use of energy by moving object
If analog circuitry is powered down to reduce power consumption, then power savings are achieved, but voltage levels decay due to current leakage
Solution Approach 1:
The patent implements feedback mechanisms where the digital control module monitors voltage levels at analog nodes and triggers refresh operations when voltage degradation exceeds thresholds. This feedback loop ensures voltage levels are maintained within acceptable ranges while minimizing power consumption by only refreshing when necessary.
Solution Approach 2:
The system performs preliminary action by sampling and storing analog voltages before they degrade significantly. By proactively capturing voltage values at clock edges and storing them digitally, the system prevents voltage decay issues before they occur, enabling clean refresh operations when needed.
3Extent of automation
If digital control techniques are applied to analog circuitry, then power management capability is improved, but system complexity increases
Solution Approach 1:
The patent introduces an intermediary digital control module that bridges digital and analog domains. This module samples analog voltages at clock edges, stores them digitally, and controls refresh operations based on digital logic. The intermediary handles the complexity of coordinating between digital control and analog voltage maintenance, isolating the complexity from both domains.
Solution Approach 2:
The system uses copying by creating digital replicas of analog voltage values through sampling. Instead of directly controlling analog circuitry, the digital control module works with copied voltage values stored in digital form, enabling sophisticated power management through digital logic while the analog circuitry remains simple.
Data Source
AI summary
A circuit portion has an analog voltage supply module, a clock and a digital control module clocked by the clock. A bias voltage is applied to an analog voltage supply module so that it supplies a voltage to a node. The voltage is sampled at the node, at a signal edge of the clock, to obtain a sampled voltage. The sampled voltage is stored, the bias voltage to the analog voltage supply module is disabled and the sampled voltage is supplied to the node. A refresh signal is subsequently generated in response to at least one refresh criterion being met; and in response to the digital control module receiving the refresh signal, a refresh sequence is initiated. The refresh sequence includes re-applying the bias voltage to the analog voltage supply module; re-sampling the voltage at the node at a signal edge of the clock; and storing the re-sampled voltage.