Noise Current Compensation Circuit for SRAM Bit Line Sensing
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Solution Overview
Problem
High noise current in circuits, particularly in SRAM bit lines, leads to decreased voltage differences between bit lines, causing instability and incorrect signal identification in follow-up circuits.
Innovation Solution
A noise current compensation circuit comprising 7 PMOS and 8 NMOS tubes, with specific connections and control signals, automatically adjusts the discharge rates of signal terminals to mitigate noise current effects, ensuring correct signal identification and circuit stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If noise current compensation circuit is added to eliminate noise current, then circuit stability is improved, but device complexity increases
Solution Approach 1:
The compensation circuit is divided into multiple functional modules: precharge transistor P1, control transistors P2-P7, and associated current paths. Each module handles a specific aspect of the compensation function, allowing the complex compensation task to be broken down into manageable segments that can be independently optimized and controlled.
Solution Approach 2:
The circuit performs preliminary precharging of bit lines through transistor P1 before the main read operation. This preliminary action prepares the circuit state in advance, ensuring that the bit lines are properly charged and ready for the subsequent compensation phase, thereby improving overall circuit stability.
2Measurement precision
If discharge rate of signal terminal is automatically adjusted to mitigate noise current, then signal identification accuracy is improved, but control complexity increases
Solution Approach 1:
The circuit employs feedback mechanisms where the state of the bit lines and control signals continuously interact. Transistors P4-P7 are controlled based on the potential changes detected in the bit lines, creating a feedback loop that automatically adjusts the discharge rate to maintain optimal signal identification conditions while compensating for noise current effects.
Solution Approach 2:
The control transistors P2-P7 dynamically adjust their conduction states based on real-time circuit conditions. The gate voltages of these transistors are modulated to continuously optimize the discharge rates of different signal terminals, allowing the circuit to adapt to changing noise conditions and maintain high signal identification accuracy.
Data Source
AI summary
Disclosed is a noise current compensation circuit. The circuit is provided with two input and output terminals A and B, and two control terminals CON and CONF. The control terminals control a work mode (work state and pre-charge state) of the compensation circuit. The compensation circuit consists of 7 PMOS transistors and 8 NMOS transistors. In the normal work state, by detecting changes of potential change rate of two signal lines in an original circuit, the noise current compensation circuit automatically enables one end of the original circuit that discharges slowly to discharge a signal more slowly, and enables one end of the original circuit that discharges rapidly to discharge a signal more rapidly, thus eliminating the influence of the noise current on the circuit and providing assistance for correct identification of subsequent circuit signals. The current compensation circuit can be used for an SRAM bit line leakage current compensation circuit, because the existence of a large leakage current on the SRAM bit line leads to the decreasing of a voltage difference between two ends of the bit line, resulting in that a subsequent circuit cannot correctly identify a signal.