Compact Noise Filter Circuit for RFI Removal and ESD Protection

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Solution Overview

Problem

Conventional noise filters for electret condenser microphones in mobile devices face challenges in improving radio frequency interference (RFI) removal characteristics without increasing chip size or reducing output voltage, as increasing capacitance values enlarges the filter size and increasing resistance values decrease output voltage.

Innovation Solution

A noise filter incorporating a junction capacitor with diode-connected terminals, a combination capacitor comprising a pn junction capacitor and an insulating capacitor connected in parallel, and a resistor, which allows for increased capacitance without enlarging the filter size and provides effective RFI removal while protecting against electrostatic discharge (ESD).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If capacitance values are increased to decrease cut-off frequency and improve RFI removal characteristics, then RFI removal characteristics are improved, but the size of the noise filter and chip size are enlarged

Engineering Contradiction:
ImproveRFI removal characteristicsVSAvoidchip size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines a pn junction capacitor and an insulating capacitor in parallel to form a combination capacitor. This merging of two different capacitor types achieves the required large capacitance value without proportionally increasing the chip area, as the insulating capacitor provides additional capacitance in a compact form factor when placed in parallel with the pn junction capacitor.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs a composite capacitor structure using two different capacitor materials/types (pn junction capacitor and insulating capacitor) connected in parallel. This composite approach leverages the different characteristics of each capacitor type to achieve high capacitance density, allowing large capacitance values to be realized in a small area on the chip.

Inventive Principle:
Principle #40Composite materials

2Reliability

If resistance value is increased to decrease cut-off frequency and improve RFI removal characteristics, then RFI removal characteristics are improved, but output voltage is reduced

Engineering Contradiction:
ImproveRFI removal characteristicsVSAvoidoutput voltage
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the capacitive parameter by using a combination of pn junction capacitor and insulating capacitor in parallel, which effectively decreases the cut-off frequency without requiring an increase in resistance value. This parameter change in the capacitive element allows RFI removal to be improved while maintaining the original resistance value and output voltage levels.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If diodes are used instead of capacitors for integration, then integration onto one chip is enabled, but ESD protection and manufacturing process requirements are compromised

Engineering Contradiction:
Improveintegration capabilityVSAvoidESD protection
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces an insulating capacitor as an intermediary element that works in parallel with the pn junction capacitor. This insulating capacitor serves as a mediator that provides the necessary capacitance for ESD protection and filter operation, enabling the diode structure to be used for integration while maintaining ESD protection capabilities through the combined capacitor network.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves improved RFI removal characteristics and resistance against ESD, enabling a compact noise-filter-incorporated amplifier integrated circuit with enhanced performance and potential cost reduction by maintaining the same chip size as conventional structures.

Implementation Method 1

a combination capacitor having a pn junction capacitor and an insulating capacitor that are connected in parallel

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

provides effective RFI removal while protecting against electrostatic discharge (ESD)

Methodology Applied
Scientific EffectElectrostatic Discharge: Electrostatic Discharge

Data Source

PatentUS8134423B2Noise filter and noise-filter-incorporated amplifier circuit
Publication Date: 2012.03.13 SEMICON COMPONENTS IND LLC
  • US8134423B2 patent drawing
  • US8134423B2 patent drawing
  • US8134423B2 patent drawing

AI summary

A ladder LPF includes a first capacitor formed of a transistor in which two terminals out of three are diode-connected, and a second capacitor formed by connecting a pn junction capacitor and an insulating capacitor in parallel. In the second capacitor, the pn junction capacitor formed in a semiconductor layer and the insulating capacitor formed in a surface of the semiconductor layer are connected to each other in parallel so as to almost overlap each other. Accordingly, the area in the LPF occupied by the second capacitor can be prevented from increasing even when its capacitance value is increased. Moreover, having the snap-back characteristics, the first capacitor can protect the second capacitor having the insulating capacitor from ESD. As a result, what can be obtained is a compact noise filter having high RFI removal characteristics and accomplishing high resistance to ESD.