Noise Reduction Circuit Using Pixel Correlation Shifts

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Solution Overview

Problem

Conventional noise reduction methods for video signals are inefficient due to large time differences in signal changes, requiring complex circuits and significant memory capacity, and often introduce delays between audio and video signals, leading to ineffective noise reduction and increased memory and circuit complexity.

Innovation Solution

A noise reduction circuit and method utilizing correlation-based noise reduction devices that compare pixel data with shifted versions of the same data in time and spatial directions, using a common video data storage device to reduce noise effectively while minimizing process delays and memory capacity, by determining whether differences are due to noise or valid image changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional noise reduction method based on signal change between frames is used, then noise reduction can be performed, but the time difference at which the signal change is obtained is large and complex circuits are needed

Engineering Contradiction:
Improvenoise reduction effectivenessVSAvoidtime difference in signal change
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the noise reduction process into multiple independent correlation calculation units, each handling different temporal shifts (1-frame shift, 2-frame shift, etc.). This segmentation allows parallel processing of noise reduction at different time lags simultaneously, reducing the overall time difference while maintaining effective noise reduction through combined results from all segments.

Inventive Principle:
Principle #1Segmentation

2Reliability

If conventional noise reduction method is used, then noise reduction can be performed, but memory capacity is enlarged requiring plurality of memories of size of one frame or memory with capacity of at least two frames

Engineering Contradiction:
Improvenoise reduction effectivenessVSAvoidmemory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges multiple correlation calculation units that would traditionally require separate large memories into a unified structure that shares a single frame-sized memory resource. By combining the operations of multiple temporal shift correlations into one integrated processing unit, the system achieves effective noise reduction while using only one frame-sized memory instead of multiple frame-sized memories or two-frame capacity memory.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If conventional noise reduction method is used, then noise reduction can be performed, but time difference between audio signal and video signal is generated requiring additional and considerable memory capacity and complex circuits for correcting the delay

Engineering Contradiction:
Improvenoise reduction effectivenessVSAvoidcircuit complexity for delay correction
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs self-service mechanisms where the correlation calculation units automatically adjust and synchronize the timing of noise reduction processing without requiring external delay correction circuits. The system inherently compensates for temporal differences through its multi-scale correlation architecture, eliminating the need for additional complex circuits to correct audio-video synchronization issues.

Inventive Principle:
Principle #25Self-service

4Device complexity

If simple structure is used for noise reduction, then device complexity is reduced, but noise reduction effectiveness may be compromised

Engineering Contradiction:
Improvecircuit structure simplicityVSAvoidnoise reduction effectiveness
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces dynamic adaptability through multiple correlation calculation units that can process different temporal shifts simultaneously. This dynamic architecture allows the system to adapt to various noise patterns and image contents without requiring complex fixed circuits, achieving effective noise reduction through flexible multi-scale correlation processing while maintaining relatively simple individual unit structures.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7280161B2Noise reduction circuit and method
Publication Date: 2007.10.09 LAPIS SEMICON CO LTD
  • US7280161B2 patent drawing
  • US7280161B2 patent drawing
  • US7280161B2 patent drawing

AI summary

A noise reduction circuit and method effectively reduce noise with a simple structure regardless of the partial content of an image while suppressing an increase in the capacity of the image memory used and process delays. The present invention forms noise-reduced data by utilizing a correlation between from the difference between a pixel subjected to noise reduction and data of a pixel that is shifted by a predetermined amount in a time direction and/or spatial direction, and forms a difference cause discriminating signal indicating whether the difference is due to a valid change of the image. The noise-reduced data and the difference cause discriminating signal are formed for a plurality of different correlations. Final noise-reduced video data are obtained by selecting a method for determining the final noise-reduced video data based on the difference cause discriminating signals, and accordingly selecting/combining the plurality of noise-reduced data.