Noise-Shaping SAR ADC Layout for Stable Sensor Signal Conversion

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Solution Overview

Problem

Analog-to-digital converters face decreased stability and signal strength due to increased noise, which affects their ability to correctly handle external inputs in sensor applications.

Innovation Solution

An analog-to-digital converter design incorporating a sample/hold circuit, digital-to-analog conversion circuit, amplifier, noise shaping filter, comparator, and successive approximation register logic, where the amplifier is strategically positioned to separate the digital-to-analog conversion circuit and noise shaping filter, effectively reducing noise and enhancing stability and signal strength.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the amplifier is positioned at the front ends of the noise shaping filter and comparator, and at the back ends of the sample/hold circuit and digital-to-analog conversion circuit, then noise is effectively decreased and stability is improved, but device complexity increases due to the strategic positioning requirements

Engineering Contradiction:
ImprovestabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The amplifier is segmented into multiple instances positioned at different locations within the ADC circuit. Specifically, amplifiers are placed at the front ends of the noise shaping filter and comparator, and at the back ends of the sample/hold circuit and digital-to-analog conversion circuit, allowing each amplifier to handle specific signal processing tasks and reduce overall noise while maintaining modularity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The amplifier acts as an intermediary component that bridges different circuit stages. By positioning amplifiers at the interfaces between the sample/hold circuit, digital-to-analog conversion circuit, noise shaping filter, and comparator, the amplifier mediates signal transmission and reduces noise interference between stages, thereby improving stability without requiring complete redesign of the entire system

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the amplifier is positioned at front ends of the noise shaping filter and comparator, and at back ends of the sample/hold circuit and digital-to-analog conversion circuit, then signal strength is maintained while noise decreases, but the design complexity increases

Engineering Contradiction:
Improvesignal strengthVSAvoiddesign complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different amplifiers are positioned at specific locations within the circuit to provide localized signal enhancement. The amplifier at the back end of the sample/hold circuit boosts the sampled signal, while amplifiers at the front ends of the noise shaping filter and comparator enhance the filtered and compared signals respectively, ensuring signal strength is maintained at each critical stage without uniformly increasing complexity throughout the entire system

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12040814B2Analog-to-digital converter, method of analog-to-digital conversion, and electronic apparatus
Publication Date: 2024.07.16 SAMSUNG DISPLAY CO LTD
  • US12040814B2 patent drawing
  • US12040814B2 patent drawing
  • US12040814B2 patent drawing

AI summary

An analog-to-digital converter includes: a sample/hold circuit, which samples an analog signal, and outputs a first voltage; a digital-to-analog conversion circuit, which converts a digital signal to output a second voltage; an amplifier, which amplifies the first voltage and the second voltage; a noise shaping filter, which integrates a residual voltage corresponding to a difference between the amplified first voltage and the amplified second voltage, and generates a first integration voltage and a second integration voltage; a comparator, which compares a sum of the amplified first voltage, the first integration voltage, and the second integration voltage with the amplified second voltage; and a SAR logic, which outputs the digital signal according to a comparison result of the comparator, and controls the digital-to-analog conversion circuit.