Tunable Non-Foster Matching Network for Real-Time Reactance Matching

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Solution Overview

Problem

Non-Foster matching networks face challenges in maintaining impedance matching between a source and a load due to variations in the target system's reactance, leading to reduced coupling efficiency and degraded performance, especially in applications like handheld devices where antenna impedance changes with proximity to objects.

Innovation Solution

A tunable non-Foster matching network with an amplification stage and a reference reactance, coupled with adjustable circuit elements, is used to continuously measure and adjust the negative reactance to match the target system's reactance, ensuring effective impedance matching through a reactance compensation system.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed non-Foster matching network is used, then the initial impedance matching is achieved, but the coupling efficiency degrades when reactance varies

Engineering Contradiction:
Improveimpedance matchingVSAvoidreactance variation适应能力
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements a tunable non-Foster matching network where the reactance value can be dynamically adjusted based on measured conditions. The network transitions from a fixed configuration to a dynamic one that adapts to varying reactance, resolving the contradiction between initial matching reliability and adaptability to changes.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent incorporates a reactance measurement and control system that continuously monitors the target system's reactance and adjusts the matching network accordingly. This feedback mechanism enables the network to maintain optimal impedance matching despite reactance variations, simultaneously achieving reliability and adaptability.

Inventive Principle:
Principle #23Feedback

2Adaptability or versatility

If the reactance is adjusted to match varying target systems, then coupling efficiency is maintained, but the device complexity increases

Engineering Contradiction:
Improvereactance adjustmentVSAvoidmatching network structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent designs a tunable non-Foster matching network that can serve multiple impedance matching requirements through a single reconfigurable structure. By making the network universally applicable to different reactance values, it reduces the need for multiple fixed networks, thereby managing complexity while maintaining adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If a tunable non-Foster matching network is implemented, then real-time reactance matching is achieved, but the system complexity increases

Engineering Contradiction:
Improvepower transfer efficiencyVSAvoidcontrol system
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements a reactance measurement and control system that continuously monitors the target system's reactance and adjusts the matching network accordingly. This feedback mechanism enables automated real-time tuning, improving power transfer efficiency while managing control complexity through intelligent automation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent enables the matching network to automatically measure and adjust its own reactance without external intervention. This self-service capability improves productivity by maintaining optimal power transfer efficiency while reducing the operational complexity for users.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances power transfer efficiency by dynamically adjusting the negative reactance to match the target system's reactance, maintaining optimal coupling over varying conditions, thereby improving system performance.

Implementation Method 1

The non-Foster matching network is configured to provide a negative reactance based on the reference reactance. The amplification stage further includes at least one adjustable circuit element configured to adjust a gain of the amplification stage and thereby adjust the negative reactance.

Methodology Applied
Scientific EffectNegative reactance generation through amplification:

Implementation Method 2

The amplification stage further includes at least one adjustable circuit element configured to adjust a gain of the amplification stage and thereby adjust the negative reactance.

Methodology Applied
Scientific EffectGain adjustment through circuit element tuning:

Implementation Method 3

The non-Foster matching network includes (i) an amplification stage having an amplifier and (ii) a reference reactance coupled in parallel with the amplifier.

Methodology Applied
Scientific EffectNon-Foster impedance transformation:

Data Source

PatentUS11057020B1Real-time matching of target reactance in non-foster matching network
Publication Date: 2021.07.06 RAYTHEON CO
  • US11057020B1 patent drawing
  • US11057020B1 patent drawing
  • US11057020B1 patent drawing

AI summary

An apparatus includes a tunable non-Foster matching network having (i) an amplification stage with an amplifier and (ii) a reference reactance coupled in parallel with the amplifier. The non-Foster matching network is configured to provide a negative reactance based on the reference reactance. The amplification stage also includes at least one adjustable circuit element configured to adjust a gain of the amplification stage and thereby adjust the negative reactance. In some cases, the amplification stage may include a common emitter amplification stage having a transistor, and the at least one adjustable circuit element may include an adjustable capacitor and/or multiple adjustable resistors in an emitter circuit of the transistor. In other cases, the amplification stage may include an operational amplifier and multiple resistors configured to set a gain of the operational amplifier, and the at least one adjustable circuit element may include at least one of the resistors.