Non-integer Interpolation for Asynchronous Clock Resampling
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Solution Overview
Problem
Resampling signals at asynchronous clock rates is complex and computationally expensive when the new sampling rate is not an integer multiple of the original rate, posing challenges in applications like radar receivers and communication systems.
Innovation Solution
An interpolation system that uses frequency domain interpolation with a clock phase detector to adjust the interpolation time interval, allowing for non-integer interpolation by dithering between lower and higher integer clock rates, ensuring phase coherence over time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If resampling is performed at non-integer multiples of the original sampling rate, then the signal can be converted to asynchronous clock rates, but the computational complexity and processing cost increase significantly
Solution Approach 1:
The patent segments the non-integer interpolation process into two distinct stages: an integer interpolation stage using polyphase filters followed by a fractional delay stage. This segmentation allows the complex non-integer resampling to be broken down into manageable integer operations plus a simpler fractional adjustment, reducing overall computational complexity while maintaining clock rate adaptability
Solution Approach 2:
The patent performs preliminary integer interpolation using polyphase filters before applying the fractional delay adjustment. By pre-processing the signal at integer multiples of the sampling rate, the system prepares the signal in advance for the final fractional adjustment, thereby simplifying the subsequent non-integer resampling operation and reducing real-time computational burden
2Adaptability or versatility
If traditional resampling methods are used for non-integer multiples, then the signal can be converted between different sampling rates, but the processing time and computational resources required increase
Solution Approach 1:
The resampling process is segmented into integer interpolation and fractional delay components, allowing parallel processing of the integer stage using efficient polyphase filter banks while the fractional delay is applied separately. This segmentation enables optimization of each stage independently, reducing total processing time
Solution Approach 2:
The patent changes the interpolation factor from a fixed non-integer value to a variable parameter that can be adjusted based on the specific clock rate conversion requirements. By dynamically adjusting the interpolation factor and using variable fractional delay techniques, the system optimizes processing time for different resampling scenarios while maintaining versatility
Data Source
AI summary
Techniques are provided for non-integer interpolation for signal sampling. A system implementing the techniques according to an embodiment includes a memory configured to store frequency values associated with an input signal sampled at a first clock rate. The system also includes a clock phase detector configured to detect phase alignment between a first clock signal associated with the first clock rate and a second clock signal associated with a second clock rate. The system further includes a read circuit configured to adjust an interpolation time interval in response to the detected phase alignment and to read the frequency values from the memory at the adjusted interpolation time interval. The system further includes a phase accumulator configured to accumulated phase as a sum of the frequency values read from the memory. The system further includes a waveform generator configured to generate an output waveform sample based on the accumulated phase.