Non-Intersecting Wiring Structure for Narrow Bezel TDDI
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Solution Overview
Problem
Current Touch and Display Driver Integration (TDDI) products experience undesired wiring intersections between the driver chip and the touch display panel, leading to parasitic capacitance and a large footprint, which hinders the achievement of a narrow bezel design and affects touch performance.
Innovation Solution
A wiring structure with non-intersecting first and second connection lines in separate wiring layers, arranged in a straight line configuration, where the second span is less than the first, allowing for a reduced footprint and minimized parasitic capacitance, enabling a smaller bezel and improved touch sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wiring lines are arranged in traditional intersecting patterns to connect driver chip to touch display panel, then electrical connectivity is achieved, but parasitic capacitance increases and footprint enlarges
Solution Approach 1:
The patent transitions from a planar wiring arrangement to a three-dimensional stacked architecture. First connection lines are disposed in a first plane while second connection lines are disposed in a second plane parallel to and separated from the first plane. This spatial separation in the vertical dimension eliminates intersections between different signal types, reducing parasitic capacitance while maintaining electrical connectivity.
Solution Approach 2:
The wiring structure is segmented into multiple functional layers: a first set of connection lines for display signals in a first plane, and a second set of connection lines for touch signals in a second plane. This segmentation separates different signal types into distinct spatial zones, preventing harmful electromagnetic interference while preserving individual signal integrity.
2Reliability
If wiring lines are arranged in traditional intersecting patterns, then connectivity is achieved, but bezel size increases
Solution Approach 1:
By utilizing the vertical dimension with stacked planes, the patent compresses the wiring footprint horizontally. The first and second connection lines are arranged in parallel planes rather than intersecting in the same plane, allowing for a more compact lateral layout that reduces bezel size while maintaining all necessary connections.
3Adaptability or versatility
If wiring lines intersect, then routing flexibility is maintained, but touch sensitivity deteriorates
Solution Approach 1:
The patent achieves routing flexibility in the horizontal plane while eliminating harmful vertical intersections. First connection lines extend in the first plane and second connection lines extend in the second plane, allowing independent routing optimization for each signal type without mutual interference, thereby preserving touch sensitivity.
4Object-generated harmful factors
If connection lines are arranged in multiple layers, then intersections are eliminated and parasitic capacitance is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent implements a two-plane wiring architecture where first connection lines are formed in a first plane and second connection lines are formed in a second plane. This approach systematically eliminates parasitic capacitance through vertical separation while using standardized multi-layer fabrication techniques, making the increased complexity manageable through established manufacturing processes.
Data Source
AI summary
A wiring structure includes a plurality of first connection lines disposed in a first wiring layer and extending respectively from first ones of the plurality of first electrical contacts to first ones of the plurality of second electrical contacts, the first connection lines not intersecting each other; and a plurality of second connection lines disposed in a second wiring layer and extending respectively from second ones of the plurality of first electrical contacts to second ones of the plurality of second electrical contacts, the second connection lines not intersecting each other. An orthographic projection of any one of the first connection lines onto a plane parallel to the first and second wiring layers does not intersect an orthographic projection of any one of the second connection lines onto the plane.