Worst Case Test Sequence Generation for Non-Linear Channels
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Solution Overview
Problem
Current methods are inadequate for generating a 'worst-case' bit sequence to test signal integrity in channels with non-linear transmitters, as they primarily focus on linear and time-invariant systems, failing to account for the complexities of modern electronic devices with non-linear components.
Innovation Solution
The development of methods and apparatuses to generate a test sequence that produces the worst or near-worst error rate in channels with non-linear drivers by simulating driver voltage waves and impulse response waves, combining them to create receiver voltage waves, and selecting a test sequence based on these combined waves.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional linear and time-invariant methods are used to generate test sequences, then the analysis is simpler and faster, but the accuracy of signal integrity analysis deteriorates for non-linear channels
Solution Approach 1:
The patent changes the fundamental parameters of the test sequence generation approach by moving from linear system assumptions to non-linear system modeling. This involves using non-linear Volterra series expansions instead of linear convolution, and employing non-linear optimization algorithms to generate worst-case test patterns that account for non-linear distortion effects in modern high-speed serial channels.
Solution Approach 2:
The patent applies preliminary action by pre-characterizing the non-linear channel response through impulse response measurements and Volterra kernel extraction before generating test sequences. This preliminary characterization data is then used to predict worst-case error rates without requiring exhaustive testing, thereby improving accuracy while managing complexity.
2Measurement precision
If non-linear channel analysis methods are implemented, then the signal integrity analysis accuracy improves, but the computational complexity increases
Solution Approach 1:
The patent segments the non-linear channel analysis into distinct components: impulse response characterization, Volterra kernel extraction, and worst-case sequence generation. Each segment can be computed independently and cached for reuse, reducing redundant computations and overall analysis time while maintaining accurate error rate predictions.
Solution Approach 2:
The patent uses simplified worst-case test patterns that are generated specifically for each channel instance rather than using complex universal test sequences. These disposable test patterns are computationally inexpensive to generate and provide sufficient accuracy for signal integrity analysis without requiring extensive computational resources.
3Reliability
If worst-case test sequences are generated for non-linear channels, then the reliability of signal transmission analysis improves, but the ease of operation deteriorates
Solution Approach 1:
The patent implements self-service by creating automated workflows that extract channel impulse responses directly from existing S-parameter or TDR measurement data, automatically compute Volterra kernels, and generate worst-case test sequences without requiring manual intervention. This automation maintains high reliability while improving ease of operation by eliminating complex manual setup procedures.
Solution Approach 2:
The patent introduces intermediary tools and interfaces that bridge the gap between raw channel measurements and worst-case test sequence generation. These intermediaries include automated impulse response extraction routines, Volterra kernel computation modules, and user-friendly configuration interfaces that simplify the overall process while maintaining accuracy.
Data Source
AI summary
Various implementations of the invention provide methods and apparatuses for generating a test sequence for a driver and channel combination, wherein the driver is non-linear. In various implementations of the invention, a test sequence is generated that produces the worst or near worst error rate of the channel. With various implementations of the invention, voltage waves at the driver and impulse response waves of the channel are generated. In various implementations of the invention, the driver voltage waves and impulse response waves are simulated responses of the driver and channel to a digital signal input. With further implementations of the invention, receiver voltage waves are generated by combining the impulse response wave and the driver voltage waves. Subsequently, a test sequence is selected based upon the combined receiver voltage wave.


