Non-Planar MOS Devices with Trench Features

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Solution Overview

Problem

Wide bandgap semiconductor devices, such as SiC MOSFETs, face challenges in device design and fabrication due to differences from silicon-based systems, leading to higher on-state resistance and channel mobility issues, which affect performance in high-voltage and high-current applications.

Innovation Solution

The development of non-planar semiconductor devices with repetitive trench features and increased surface area, such as triangular, square, or sine wave profiles, which enhance channel width and reduce resistance by increasing the effective surface area and contact area, applicable to SiC and other semiconductor materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional planar device structures are used, then manufacturing is simpler, but on-state resistance is higher and channel mobility is reduced

Engineering Contradiction:
Improvedevice structure simplicityVSAvoidon-state resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies curvature by transitioning from planar surfaces to non-planar surfaces with repeating features (ridges, trenches, undulations) on the drift layer. This curved/non-planar geometry increases the effective channel width and surface area, thereby reducing on-state resistance and improving channel mobility without significantly complicating the manufacturing process

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent introduces dimensional complexity by creating non-planar surfaces with repeating features that extend in multiple directions. The undulating surfaces, trenches, and ridges add vertical and lateral dimensions to the channel structure, increasing effective channel width and surface area, which reduces on-state resistance while maintaining manufacturability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If non-planar device structures with repetitive features are used, then channel width and surface area increase reducing resistance, but device complexity increases

Engineering Contradiction:
Improveon-state resistanceVSAvoiddevice structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the drift layer surface into repeating features such as ridges, trenches, and undulations. This segmentation creates multiple channels in parallel, increasing the effective channel width and surface area. The segmented structure reduces on-state resistance while the repetitive nature of the features keeps the manufacturing process manageable

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements nested structures by forming non-planar well regions and doped regions within the non-planar drift layer. The well regions are conformally disposed in the non-planar surface, and additional doped regions are formed within the well regions, creating nested configurations that maximize channel width within the available space while maintaining structural integrity

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS9748341B2Metal-oxide-semiconductor (MOS) devices with increased channel periphery
Publication Date: 2017.08.29 GENERAL ELECTRIC CO
  • US9748341B2 patent drawing
  • US9748341B2 patent drawing
  • US9748341B2 patent drawing

AI summary

A semiconductor device includes a drift layer disposed on a substrate. The drift layer has a non-planar surface having a plurality of repeating features oriented parallel to a length of a channel of the semiconductor device. Further, each the repeating features have a dopant concentration higher than a remainder of the drift layer.