Non-Planar Nitride Semiconductor Growth Layer for Defect Reduction

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Solution Overview

Problem

The challenge is to enhance the crystal quality of optoelectronic semiconductor chips, particularly those made of nitride compound semiconductors, which are prone to lattice mismatches leading to stress and defects, affecting their efficiency in generating radiation in the short-wave visible or ultraviolet spectral range.

Innovation Solution

A non-planar growth layer with structural elements is used, combined with a transparent conductive oxide (TCO) cover layer, which reduces strain and improves crystal quality by allowing for a three-dimensional growth of the active zone, thereby minimizing defects and increasing light yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a planar growth layer is used, then the manufacturing process is simple, but lattice mismatches cause stress and defects that reduce crystal quality

Engineering Contradiction:
Improvecrystal qualityVSAvoidgrowth layer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The growth layer is transformed from a planar surface to a non-planar surface with structural elements having curved surfaces. This curvature allows the active zone to grow in a three-dimensional configuration that reduces lattice mismatch stress and prevents defect formation, thereby improving crystal quality while managing the increased structural complexity through geometric design

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The invention transitions from two-dimensional planar growth to three-dimensional non-planar growth by introducing structural elements with varying heights and curved surfaces. This dimensional change enables stress distribution in multiple directions and creates a growth architecture that accommodates lattice mismatches without generating defects, resolving the contradiction between manufacturing simplicity and crystal quality

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the growth surface is enlarged with structural elements, then strain is reduced and defect formation decreases, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvedefect reductionVSAvoidgrowth layer fabrication
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The structural elements are formed with curved surfaces rather than sharp edges or flat tops. This curvature facilitates more uniform material deposition during growth and reduces stress concentration points, making the manufacturing process more robust despite the increased geometric complexity. The curved surfaces also enlarge the effective growth area smoothly, reducing strain without creating manufacturing difficulties

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The invention optimizes parameters such as the height, radius, and spacing of the structural elements to achieve the desired strain reduction while keeping the manufacturing process feasible. By carefully controlling these geometric parameters, the patent balances the complexity of creating non-planar structures with the benefits of reduced defect formation and improved reliability

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If conventional semiconductor cover layers are used, then high temperatures and long growth times are required, but this causes indium diffusion and reduces crystal quality

Engineering Contradiction:
Improvecrystal qualityVSAvoidproduction time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent changes the material parameter of the cover layer from conventional semiconductor materials to transparent conductive oxides. This material substitution fundamentally alters the growth conditions, enabling deposition at lower temperatures and shorter times. The TCO material inherently prevents indium diffusion while maintaining crystal quality, resolving the contradiction between production efficiency and manufacturing precision

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The use of transparent conductive oxides as cover layers introduces a composite material approach, combining the benefits of conductivity, transparency, and low-temperature processing. This composite material solution enables rapid growth without indium diffusion, simultaneously improving crystal quality and reducing production time compared to conventional semiconductor cover layers

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in improved crystal quality, reduced non-radiative recombination, increased light output, and lower production temperatures and times, while maintaining the ability to generate radiation in the short-wave visible spectral range, particularly emitting green light effectively.

Implementation Method 1

The cap layer made of a transparent conductive oxide can reduce stresses compared to a layer made of semiconductor material and thus improve the material quality

Methodology Applied
Scientific EffectStress reduction:

Implementation Method 2

By growing the quantum well structure on a side facet, piezoelectric fields caused by lattice mismatches are to be reduced and the homogeneity of the quantum well structure is to be improved

Methodology Applied
Scientific EffectPiezoelectric effect: Piezoelectric Effect

Implementation Method 3

Semiconductor chips made of nitride compound semiconductors are particularly suitable for generating radiation with a wavelength in the short-wave visible or ultraviolet spectral range

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentEP2313934B1Production method for a iii-v based optoelectronic semiconductor chip containing indium and corresponding chip
Publication Date: 2018.01.17 OSRAM OPTO SEMICON GMBH & CO OHG
  • EP2313934B1 patent drawingFigure 1~2
  • EP2313934B1 patent drawingFigure 3~4
  • EP2313934B1 patent drawingFigure 5~6

AI summary

The present invention describes an optoelectronic semiconductor chip (1) having a non-planar growth layer (2), which contains at least one first nitride compound semiconductor material, as well as an active zone (5), which contains at least one second nitride compound semiconductor material and is arranged on the growth layer (2), and a covering layer (7) which is arranged on the active zone (5), wherein the growth layer (2) has structure elements (4) on a growth surface (3) facing the active zone (5).