Non-Selective Source/Drain Deposition for Transistor Dopant Activation
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Solution Overview
Problem
Standard field-effect transistor processing, particularly for non-planar transistors, faces challenges with selective deposition of source and drain (S/D) material, leading to limited dopant activation, shallower dopant profiles, and lower channel strain due to inactive dopant issues, which restricts transistor performance.
Innovation Solution
The use of non-selective deposition of S/D material combined with isolation structures and hardmask processing to selectively retain the material in S/D regions, achieving higher dopant activation and channel strain while preventing electrical shorting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If selective deposition of S/D material is used, then material is deposited only in desired regions, but dopant activation is limited and dopant profiles are shallower
Solution Approach 1:
The patent segments the S/D material deposition process into two distinct stages: first depositing material selectively in S/D regions using selective epitaxial growth, then performing a blanket doping step that uniformly distributes dopants across the entire wafer. This segmentation allows the dopants to penetrate deeper into the substrate and achieve higher activation levels without compromising the spatial precision of material placement.
Solution Approach 2:
The patent performs preliminary selective deposition of S/D material to define precise regional boundaries before introducing dopants. By establishing the material structure first through selective epitaxial growth, the subsequent blanket doping can proceed uniformly across the wafer while the pre-formed material structure ensures dopants are concentrated in the intended S/D regions, achieving both precision and high dopant activation.
2Manufacturing precision
If selective deposition of S/D material is used, then material placement is precise, but channel strain is reduced
Solution Approach 1:
The patent segments the processing into selective material deposition followed by blanket doping, where the material structure is precisely defined first, then strain is introduced uniformly through blanket doping. This allows the channel region to receive maximum strain from the blanket-doped S/D material while maintaining precise material placement boundaries.
Solution Approach 2:
The patent changes the deposition parameters from selective conditions (low temperature, specific gas flows) to blanket conditions (higher temperature, uniform exposure) for the doping step. This parameter transition enables deeper dopant penetration and increased strain in the channel region while the previously established material structure maintains spatial precision.
3Reliability
If non-selective deposition of S/D material is used, then dopant activation and channel strain are improved, but electrical shorting occurs
Solution Approach 1:
The patent segments the deposition process into selective material placement followed by blanket doping. The selective epitaxial growth stage creates physical barriers (isolation structures) that prevent electrical shorting, while the subsequent blanket doping stage provides uniform dopant distribution for high activation and strain without causing shorting between regions.
Solution Approach 2:
The patent introduces isolation structures as intermediary elements between S/D regions during the selective deposition phase. These isolation structures act as barriers that prevent electrical shorting, allowing the subsequent blanket doping to proceed uniformly across the wafer without creating harmful electrical connections between adjacent devices.
4Quantity of substance
If blanket doping is performed after selective deposition, then dopant concentration and activation are significantly enhanced, but process complexity increases
Solution Approach 1:
The patent employs self-service mechanisms where the selectively deposited S/D material automatically defines the regions that will receive dopants during blanket doping. The material structure itself serves as a template that guides dopant distribution, eliminating the need for additional masking or patterning steps and reducing overall process complexity despite the two-stage approach.
Solution Approach 2:
The patent utilizes parameter changes between the two stages: selective deposition occurs at lower temperatures with controlled gas flows, while blanket doping occurs at higher temperatures with uniform exposure. This parameter transition simplifies the process by using standard semiconductor manufacturing techniques for each stage without requiring complex intermediate steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in significantly higher dopant concentrations and activation percentages, enhancing transistor performance by up to 10 times in dopant concentration and 9 times in activation, and applying greater strain to the channel region for improved mobility and device performance.
Implementation Method 1
non-selective deposition of source/drain material
Data Source
AI summary
Techniques are disclosed for forming transistors employing non-selective deposition of source and drain (S/D) material. Non-selectively depositing S/D material provides a multitude of benefits over only selectively depositing the S/D material, such as being able to attain relatively higher dopant activation, steeper dopant profiles, and better channel strain, for example. To achieve selectively retaining non-selectively deposited S/D material only in the S/D regions of a transistor (and not in other locations that would lead to electrically shorting the device, and thus, device failure), the techniques described herein use a combination of dielectric isolation structures, etchable hardmask material, and selective etching processes (based on differential etch rates between monocrystalline semiconductor material, amorphous semiconductor material, and the hardmask material) to selectively remove the non-selectively deposited S/D material and then selectively remove the hardmask material, thereby achieving selective retention of non-selectively deposited monocrystalline semiconductor material in the S/D regions.