Non-speculative Cache Deferring State Updates

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Solution Overview

Problem

In processor-based systems, speculative data requests can lead to cache pollution and security issues due to mispredictions, where malicious attackers can prime the cache and control prediction circuits to learn information about victim processes by evicting data and causing incorrect speculative data to be loaded into the cache.

Innovation Solution

Implementing a non-speculative cache memory system that defers cache state updates until data requests become non-speculative, using a speculative buffer to store data from speculative load instructions and only committing it to the cache if the prediction is correct, thereby preventing incorrect data from being evicted and reducing cache pollution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If speculative data requests are processed immediately, then processor performance is improved through speculative execution, but cache pollution occurs and security vulnerabilities arise from mispredicted data being loaded into cache

Engineering Contradiction:
Improveprocessor performanceVSAvoidcache pollution and security vulnerabilities
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the cache memory into two distinct parts: a fill buffer for storing speculative data and a main cache data array for storing committed data. This segmentation allows speculative data to be isolated from the main cache, preventing cache pollution while maintaining the benefits of speculative execution for processor performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The fill buffer acts as an intermediary structure between the processor and the main cache data array. Speculative data is first loaded into the fill buffer, and only after commitment is it transferred to the main cache. This intermediary mechanism prevents premature cache updates that would cause pollution while still enabling fast speculative access.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If cache state updates are performed immediately for speculative requests, then data access speed is improved, but incorrect data evicts valid cache entries causing security leaks

Engineering Contradiction:
Improvedata access speedVSAvoidcache entry validity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements preliminary action by loading speculative data into the fill buffer before it is committed. This allows the data to be prepared and made available for fast access if the speculation is correct, while preventing it from contaminating the main cache if the speculation fails. The cache state update is deferred until commitment occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces dynamic behavior to the cache update mechanism by conditionally updating cache states based on speculation outcomes. Cache lines are marked with a committed bit that controls whether they can be evicted, allowing the system to adaptively manage cache validity based on the status of speculative requests.

Inventive Principle:
Principle #15Dynamics

3Object-affected harmful factors

If a separate fill buffer structure is added to defer cache updates, then cache pollution is prevented, but device complexity increases

Engineering Contradiction:
Improvecache pollutionVSAvoidcache memory structure
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the fill buffer functionality with the existing cache memory structure by integrating it as a component within the cache hierarchy. The fill buffer shares the same physical memory space and control logic with the main cache, reducing overall device complexity while still providing the necessary separation to prevent cache pollution.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The fill buffer structure is designed to serve multiple functions: it acts as a staging area for speculative data, a validation buffer for committed data, and a source for fast data access. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4025996B1Deferring cache state updates in a non-speculative cache memory in a processor-based system in response to a speculative data request until the speculative data request becomes non-speculative
Publication Date: 2023.12.27 MICROSOFT TECHNOLOGY LICENSING LLC
  • EP4025996B1 patent drawingFigure 1
  • EP4025996B1 patent drawingFigure 2
  • EP4025996B1 patent drawingFigure 3

AI summary

Deferring cache state updates in a non-speculative cache memory in a processor-based system in response to a speculative data request until the speculative data request becomes non-speculative is disclosed. The updating of at least one cache state in the cache memory resulting from a data request is deferred until the data request becomes non-speculative. Thus, a cache state in the cache memory is not updated for requests resulting from mispredictions. Deferring the updating of a cache state in the cache memory can include deferring the storing of received speculative requested data in the main data array of the cache memory as a result of a cache miss until the data request becomes non-speculative. The received speculative requested data can first be stored in a speculative buffer memory associated with a cache memory, and then stored in the main data array if the data request becomes non-speculative.