Non-Synthesizable HDL Components for Circuit Debugging
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Solution Overview
Problem
Debugging complex circuit designs in HDL code is difficult and time-consuming due to lengthy and complex signal paths, as existing solutions that add unique identifiers result in increased circuit size, cost, and power consumption during synthesis.
Innovation Solution
Appending non-synthesizable components with unique identifiers to the HDL code, which are omitted during netlist synthesis, allowing for efficient simulation and verification without adding unnecessary circuit elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Difficulty of detecting and measuring
If unique identifiers are added to trace signal paths for debugging, then debugging capability is improved, but circuit size increases
Solution Approach 1:
The patent introduces non-synthesizable components as intermediary elements that carry unique identifiers through the circuit during simulation. These components act as mediators between the physical circuit elements and the debugging/verification process, enabling traceability without becoming part of the final synthesized circuit.
Solution Approach 2:
The patent extracts the identification and tracing function from the physical circuit implementation by using non-synthesizable components. These components are taken out from the synthesis process entirely - they exist only in the HDL model for verification purposes and are removed before netlist generation, leaving the final circuit without the additional overhead.
2Difficulty of detecting and measuring
If non-synthesizable components are added for verification, then debugging capability is improved, but device complexity increases
Solution Approach 1:
The patent segments the circuit model into two distinct parts: synthesizable physical components that will be implemented, and non-synthesizable verification components that aid debugging. This segmentation allows each part to serve its specific purpose without interfering with the other, managing complexity through clear separation of concerns.
Solution Approach 2:
The patent changes the synthesizability parameter of certain components from true to false, creating a dual-mode system where components can be either synthesizable or non-synthesizable. This parameter change enables the same HDL code to serve both verification and synthesis purposes by simply adjusting the synthesizable attribute of specific components.
3Loss of information
If identifiers are added to all components for tracing, then signal path tracing is improved, but netlist size increases
Solution Approach 1:
The non-synthesizable components with identifiers serve as intermediaries that preserve traceability information during simulation but do not propagate into the final netlist. They mediate between the need for detailed tracing during verification and the requirement for a clean, minimal final circuit description.
Solution Approach 2:
The patent creates a parallel copy of the circuit signal paths using non-synthesizable components. This copy exists solely for verification and tracing purposes during simulation, while the original physical circuit paths remain unchanged and are what gets synthesized into the final netlist, avoiding any size increase.
Data Source
AI summary
A method for circuit design automation includes appending a non-synthesizable input having a unique identifier to HDL code that specifies a physical input of the circuit. For the physical components in the circuit to which a signal from the physical input is to propagate, corresponding non-synthesizable components are appended, having respective identifiers assigned responsively to the unique identifier of the non-synthesizable input, to the HDL code that specifies the physical components. The design is verified by simulating operation of the circuit using the HDL code, including both the physical and non-synthesizable inputs and components. After verifying the design, a netlist synthesis tool automatically generates a netlist of the circuit including the physical inputs and components while omitting the non-synthesizable inputs and components.