Non-Uniform Vertical Transfer Gate Spacing for Image Sensor Blooming

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Solution Overview

Problem

Image sensors with vertical transfer gates suffer from blooming artifacts and image lag, which degrade image quality due to the trade-off between spacing of vertical transfer gates affecting electrical field strength and optical crosstalk.

Innovation Solution

Non-uniform spacing between vertical transfer gates is introduced, with a top average-separation exceeding the bottom average-separation at different depths, to reduce both blooming and image lag by optimizing the electrical field and charge transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If uniform spacing between vertical transfer gates is used, then manufacturing is simplified, but image quality degrades due to either blooming or image lag

Engineering Contradiction:
Improveuniform gate spacingVSAvoidimage quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by varying the spacing between vertical transfer gates at different depths. The first spacing (at a first depth) is different from the second spacing (at a second depth), allowing optimization of electrical field strength and optical crosstalk control at different locations within the pixel structure. This resolves the contradiction by moving from uniform to non-uniform spacing tailored to local requirements.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces asymmetry in the gate spacing configuration, where the spacing between vertical transfer gates is intentionally made non-uniform across different depths. The first spacing and second spacing are deliberately different values, creating an asymmetric structure that optimizes both blooming reduction and image lag prevention, thereby improving image quality while remaining manufacturable.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If spacing between vertical transfer gates is decreased, then electrical field strength increases improving charge transfer, but blooming artifacts increase

Engineering Contradiction:
Improvecharge transfer efficiencyVSAvoidblooming artifacts
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent uses local quality by applying different spacing values at different depths. At the first depth, a first spacing is used to optimize electrical field strength for charge transfer, while at the second depth, a different second spacing is used to control optical crosstalk and prevent blooming. This localized differentiation resolves the contradiction between charge transfer efficiency and blooming prevention.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent resolves the contradiction by adding a depth dimension to the spacing parameter. Instead of using a single spacing value in one dimension, the invention varies spacing across the depth dimension, with first spacing at first depth and second spacing at second depth. This multi-dimensional approach allows simultaneous optimization of both charge transfer and blooming control.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If pixel density is increased by decreasing pixel size, then resolution improves, but vertical transfer gates become necessary which introduce blooming and image lag

Engineering Contradiction:
Improveimage resolutionVSAvoidimage quality
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent addresses the contradiction by implementing non-uniform spacing of vertical transfer gates at different depths within each pixel. This local optimization allows the vertical gate structure necessary for high pixel density to function effectively without introducing excessive blooming or image lag, thereby maintaining both high resolution and good image quality.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the spacing parameter of vertical transfer gates from uniform to non-uniform across different depths. By varying the spacing parameter (first spacing at first depth, second spacing at second depth), the invention optimizes the performance of vertical transfer gates to reduce blooming and image lag artifacts, enabling high pixel density while maintaining image quality.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively minimizes blooming and image lag, enhancing image quality by allowing for stronger electrical fields and improved charge transfer without increasing blooming or image lag artifacts.

Implementation Method 1

Light reaching the photodiode generates photoelectrons

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

Turning on the transfer gate forms a conducting channel that allows the accumulated photoelectrons to transfer or flow from the photodiode to the floating diffusion region

Methodology Applied
Scientific EffectElectrical field: Electric Field

Data Source

PatentUS20230079156A1Artifact-Reducing Pixel And Method
Publication Date: 2023.03.16 OMNIVISION TECHNOLOGIES INC
  • US20230079156A1 patent drawing
  • US20230079156A1 patent drawing
  • US20230079156A1 patent drawing

AI summary

A pixel includes a semiconductor substrate that includes a floating diffusion region and a photodiode region. The pixel also includes, between a front surface of the semiconductor substrate and a back surface opposing the front surface: a first trench and a second trench adjacent to the first trench in a separation direction that is both (a) parallel to the front surface and (b) in a plane that is perpendicular to the front surface. Each of the first and second trench (a) is between the floating diffusion region and the photodiode region and (b) extends into the semiconductor substrate from the front surface. In the separation direction, a top average-separation between the first and second trench, at depths between the front surface and a first depth in the semiconductor substrate, exceeds a bottom average-separation between the first and second trench, at depths exceeding the first depth.