Non-Volatile Memory Bit Recognition via Dynamic Gate Voltage Scanning
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Solution Overview
Problem
Conventional sensing methods for non-volatile memory cells are not optimized to determine multiple bits stored in a single cell, as they operate outside the most sensitive response region, leading to uneven distribution of electrical responses and limited resolvable threshold voltage levels.
Innovation Solution
Applying discrete scanning voltages to the control gate of non-volatile memory cells, ensuring that the electrical responses reach the most sensitive region, allowing for the determination of bits stored on the floating gate by matching the voltage to the specific combination of bits representing the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional sensing methods are used to read non-volatile memory cells, then the reading process is simple, but the number of resolvable threshold voltage levels is limited and the electrical responses are unevenly distributed
Solution Approach 1:
The patent applies dynamics by transitioning from fixed gate voltage sensing to dynamic scanning gate voltage. The gate voltage is swept across a range of values during the read operation, allowing the system to dynamically identify the threshold voltage level that corresponds to the stored data. This dynamic approach enables resolution of multiple threshold voltage levels (e.g., 16 levels for 4-bit storage) by detecting where the transistor transitions between off and on states during the voltage sweep, thereby increasing measurement precision without proportionally increasing device complexity.
Solution Approach 2:
The patent changes the gate voltage parameter from a fixed value to a sweeping variable that traverses a defined range. By varying the gate voltage continuously or in steps across multiple levels during the read operation, the system can distinguish between multiple threshold voltage levels corresponding to different stored bit patterns. This parameter change transforms a binary read operation into a multi-level detection process, enabling higher precision measurement of the stored analog threshold voltage state.
2Measurement precision
If a fixed gate voltage is applied during reading, then the sensing operation is fast and simple, but the electrical response does not reach the most sensitive region leading to limited bit resolution
Solution Approach 1:
The patent applies preliminary action by performing a voltage sweep to pre-identify the threshold region before final data determination. During the read operation, the gate voltage is swept through a range that encompasses all possible threshold voltage levels, and the system detects where the transistor transitions from off to on state. This preliminary sweeping action identifies the precise threshold region, allowing accurate bit determination without requiring multiple repeated measurements, thus achieving high precision while managing read time efficiently.
Solution Approach 2:
The patent employs periodic action through the repeated sweeping of gate voltage during read operations. The voltage sweep can be performed in periodic cycles, allowing the system to systematically traverse the voltage range and detect threshold transitions. This periodic sweeping ensures that the most sensitive response region is consistently reached, improving bit determination accuracy through repeated reliable measurements while maintaining a predictable and manageable read time profile.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the storage of multiple bits in a single non-volatile memory cell by resolving more threshold voltage levels, thereby increasing the number of bits that can be stored, as demonstrated by the formula n = log2N, where N is the number of resolvable threshold voltage levels.
Implementation Method 1
a non-volatile memory device such as a MOSFET (a 'metal oxide semiconductor field effect transistor') with a floating gate can store varying amounts of charge on the floating gate
Implementation Method 2
a conductive gate (also called the 'control gate') to which is applied a voltage which normally will cause the channel region between the source and drain of the underlying MOS field effect transistor to invert to the same conductivity type as the source and drain and thus 'turn on'
Data Source
AI summary
Storage of information represented by a multi-bit word in a single non-volatile memory cell is made possible by programming the threshold voltage of the non-volatile memory to a specific threshold level corresponding to the multi-bit word. Stored or generated multi-bit words are scanned and converted into a gate voltage to be applied to the non-volatile memory cell until the electrical response from the non-volatile memory cell indicates that the voltage generated from the specific multi-bit word which has been applied to the gate matches the information stored in the non-volatile memory cell. The matched multi-bit word is read out of storage and represents the stored bits in the single non-volatile memory cell.