Non-Binary SAR ADC Mode Switching for Thermal Noise Control
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Solution Overview
Problem
Successive Approximation Register (SAR) ADCs face challenges in high resolution and sampling frequency requirements due to increased thermal noise and limited bandwidth, which affects signal-to-noise ratio (SNR) and power efficiency, especially in modern CMOS technologies with reduced voltage supply.
Innovation Solution
A non-binary successive approximation ADC with dynamic noise adaptation, using switchable capacitors and adjustable clock frequencies to operate in different modes with varying noise properties, allowing for redundancy in conversion steps to compensate for thermal noise and improve SNR without significant power consumption or silicon area impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high resolution and high sampling frequency are implemented in SAR ADC, then conversion accuracy and speed are improved, but thermal noise increases and bandwidth is limited, degrading signal-to-noise ratio
Solution Approach 1:
The patent applies dynamics by making the bandwidth of the SAR loop variable rather than fixed. The bandwidth is dynamically adjusted based on the conversion step: wider bandwidth is used in early conversion steps where overrange is large and can tolerate noise, while narrower bandwidth is used in later steps where overrange is small and noise compensation capability is reduced. This dynamic adaptation allows the system to optimize the trade-off between speed and noise performance at different stages of the conversion process.
Solution Approach 2:
The patent changes the bandwidth parameter of the SAR loop throughout the conversion process. By modifying the bandwidth parameter dynamically - starting with wider bandwidth and progressively narrowing it - the system adapts to the changing noise tolerance requirements at different conversion steps. This parameter change enables the system to maintain high conversion accuracy while managing thermal noise effectively.
2Productivity
If high sampling frequency is used to improve conversion speed, then productivity is improved, but thermal noise increases and affects signal-to-noise ratio
Solution Approach 1:
The patent uses dynamics to adjust the bandwidth according to the conversion progress. In early conversion steps, the wider bandwidth enables faster conversion without excessive noise impact. As conversion progresses and overrange decreases, the bandwidth is narrowed to reduce thermal noise, maintaining signal-to-noise ratio while still achieving high overall conversion speed through the initial fast steps.
Solution Approach 2:
The patent implements periodic action by changing the bandwidth at different conversion steps. The bandwidth is periodically adjusted - wider for early steps and narrower for later steps - creating a structured pattern of bandwidth variation that optimizes both conversion speed and noise performance throughout the conversion process.
3Device complexity
If fixed bandwidth is used in SAR loop, then device complexity is reduced, but noise performance degrades at high conversion speeds
Solution Approach 1:
The patent introduces dynamics by making the bandwidth variable rather than fixed. This dynamic bandwidth adjustment adds some complexity to the loop structure, but it is a controlled complexity that directly addresses the noise performance issue. The dynamic element allows the system to adapt to different conversion stages, improving noise performance without requiring a completely complex redesign of the entire ADC architecture.
Data Source
AI summary
A non-binary successive approximation analogue to digital converter, for converting using successive conversion steps, is operable in first and second modes. The first and second modes have different noise properties and the converter is switched between the modes during the conversion process.