Non-coplanar lead frame prevents silicon debris shorts

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Silicon debris generated during semiconductor wafer dicing can cause electrical leakage or shorts when the semiconductor die is mounted on the lead frame, as it may embed into non-conductive adhesive layers and contact the die attach pad, leading to electronic grounding issues.

Innovation Solution

The semiconductor device design features a lead frame with a die attach pad having a mounting surface of smaller area than the adhesive layer, allowing the silicon die and adhesive layer to overhang without touching the pad, and leads are spaced apart to prevent contact, with options including etched, grooved, or bumped configurations to ensure physical separation and fill the overhanging region with mold compound for electrical isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the semiconductor die is mounted directly on the die attach pad, then the mounting process is simple and direct, but silicon debris can embed into the adhesive layer and contact the pad causing electrical leakage

Engineering Contradiction:
Improvemounting process simplicityVSAvoidelectrical isolation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The lead frame structure transitions from a coplanar configuration to a three-dimensional non-coplanar arrangement by extending leads vertically beyond the die attach pad surface. This dimensional change creates spatial separation between the die assembly and the lead frame electrical contacts, preventing silicon debris from bridging electrical paths while maintaining manufacturing simplicity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The lead frame is segmented into distinct functional zones: the die attach pad for mechanical support, the adhesive layer for bonding, and the extended leads for electrical connection. This segmentation allows each component to perform its specific function independently, with the extended leads acting as a physical barrier that isolates silicon debris from electrical contacts.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If the lead frame uses a coplanar configuration, then the structure is simple and manufacturing is easier, but it cannot provide adequate isolation from silicon debris

Engineering Contradiction:
Improvelead frame structureVSAvoidsilicon debris contamination
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The lead frame extends beyond the coplanar plane by projecting leads vertically above and below the die attach pad surface. This non-coplanar configuration creates a three-dimensional isolation zone that physically separates silicon debris generated during dicing from the electrical contact paths, effectively eliminating the harmful contamination effect.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Strength

If the die attach pad area is made larger to support the die, then mechanical support is improved, but the risk of silicon debris contact increases

Engineering Contradiction:
Improvemechanical supportVSAvoidsilicon debris contact risk
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The solution decouples the mechanical support function from the electrical contact function by extending the leads vertically beyond the die attach pad boundaries. This allows the pad to maintain sufficient area for mechanical support while the extended leads create a protective barrier that prevents silicon debris from reaching electrical contacts, even when the pad area is large.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20230170282A1Non-coplanar or bumped lead frame for electronic isolation device
Publication Date: 2023.06.01 TEXAS INSTRUMENTS INC
  • US20230170282A1 patent drawing
  • US20230170282A1 patent drawing
  • US20230170282A1 patent drawing

AI summary

A semiconductor device includes a silicon die having a first side and a second side, an adhesive layer attached to the first side of the silicon die, and a lead frame. The lead frame comprises a die attach pad having a mounting surface. The mounting surface has a smaller area than an area of the adhesive layer. The silicon die is mounted on the lead frame at the mounting surface so that edges of the silicon die and the adhesive layer overhang the die attach pad without touching the die attach pad. The semiconductor device further includes one or more leads that are spaced apart from the edges of the silicon die and the adhesive layer.