Nonlinear Current-Mode Multiplication for Low-Power Edge AI MACs

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Solution Overview

Problem

Current digital AI & ML solutions are costly and power-hungry, making them unsuitable for edge or sensor applications, and they rely on expensive deep sub-micron manufacturing, which is not necessary for many AI & ML tasks, leading to inefficiencies in power consumption and cost.

Innovation Solution

The development of current-mode data-converters, multipliers, and multiply-accumulate circuits that can interface with digital systems, operate at low power, and are manufactured using mainstream CMOS technology, enabling hybrid analog and digital signal processing, asynchronous operations, and memory-free processing to reduce power consumption and cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If standard digital solutions are used for AI & ML applications, then ease of interface compatibility and programming flexibility are improved, but power consumption and cost increase significantly

Engineering Contradiction:
Improveinterface compatibilityVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent replaces standard digital processing with mixed-signal processing that combines analog and digital domains. Current-mode data converters and multipliers perform AI/ML operations in the analog current domain, substituting traditional voltage-based digital processing with current-based hybrid processing to reduce power consumption while maintaining computational functionality

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the fundamental operating parameters by using current-mode signaling instead of voltage-mode digital signaling. Current-mode data converters transform digital inputs to analog current outputs, and current-mode multipliers perform multiplication in the current domain, enabling lower power consumption operations for AI/ML applications

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If bleeding edge deep sub-micron manufacturing is used, then manufacturing precision is improved, but cost and power consumption increase

Engineering Contradiction:
Improvedeep sub-micron precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent changes the manufacturing parameter requirements by designing current-mode circuits that can operate with standard CMOS process variations. The current-mode architecture is inherently more tolerant of process variations, allowing deployment on cheaper 45nm to 90nm mainstream manufacturing nodes instead of expensive deep sub-micron processes

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If current-mode data-converters and multipliers are used, then power consumption is reduced, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent merges data conversion and multiplication functions into integrated mixed-signal blocks. Current-mode data converters and current-mode multipliers are combined in a unified architecture where the output of one stage directly feeds the next, reducing overall system complexity despite the advanced functionality of individual components

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The current-mode multipliers serve multiple functions including multiplication, accumulation, and support for various activation functions (linear, sigmoid, tanh, ReLU). This multi-functionality reduces the need for separate dedicated circuits for each operation, thereby managing device complexity while providing comprehensive AI/ML processing capabilities

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10826525B1Nonlinear data conversion for multi-quadrant multiplication in artificial intelligence
Publication Date: 2020.11.03 FAR ALI TASDIGHI
  • US10826525B1 patent drawing
  • US10826525B1 patent drawing
  • US10826525B1 patent drawing

AI summary

Multipliers and Multiply-Accumulate (MAC) circuits are fundamental building blocks in signal processing, including in emerging applications such as machine learning (ML) and artificial intelligence (AI) that predominantly utilize digital-mode multipliers and MACs. Generally, digital multipliers and MACs can operate at high speed with high resolution, and synchronously. As the resolution and speed of digital multipliers and MACs increase, generally the dynamic power consumption and chip size of digital implementations increases substantially that makes them impractical for some ML and AI segments, including in portable, mobile, near edge, or near sensor applications. The multipliers and MACs utilizing the disclosed current mode data-converters are manufacturable in main-stream digital CMOS process, and they can have medium to high resolutions, capable of low power consumptions, having low sensitivity to power supply and temperature variations, as well as operating asynchronously, which makes them suitable for high-volume, low cost, and low power ML and AI applications.