Nonlinear Capacitor Majority Logic Gates for Low-Leakage Switching
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Solution Overview
Problem
Traditional multi-input logic gates face challenges in reducing power consumption due to high power usage and leakage issues caused by non-rail-to-rail voltage swings at the input of drivers, leading to inefficiencies in existing circuit architectures.
Innovation Solution
The implementation of non-linear polar material-based capacitors in logic gates, which enable rail-to-rail voltage at the summing node, reducing leakage and power consumption by eliminating the need for switching transistors and minimizing interconnects, and allowing for lower voltage operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional multi-input logic gates are implemented with multiple transistors and interconnects, then logic function is achieved, but power consumption increases and leakage occurs due to non-rail-to-rail voltage swings
Solution Approach 1:
The patent changes the voltage swing parameter from non-rail-to-rail to rail-to-rail by using capacitive logic gates where the output voltage swings between ground and supply voltage rails. This is achieved by using capacitors to store charge and drive the output node, eliminating the need for complex transistor switching networks while reducing power consumption and leakage.
Solution Approach 2:
The patent extracts and eliminates the switching transistor network from traditional logic gate implementation. Instead of using transistors as switches, the invention uses capacitive charging/discharging mechanisms to implement logic functions, removing the harmful switching transistors that cause leakage and power consumption while maintaining logic functionality.
2Productivity
If traditional logic gates use switching transistors and interconnects, then logic operation is performed, but interconnect length increases and power efficiency decreases
Solution Approach 1:
The patent merges the logic function implementation with capacitive charge storage and transfer mechanisms. By combining the logic operation with the capacitive coupling between stages, the invention eliminates separate interconnect structures, reducing interconnect length and improving power efficiency while maintaining logic operation capability.
3Loss of energy
If rail-to-rail voltage is achieved at summing node, then leakage is reduced and power consumption decreases, but non-linear polar material-based capacitors are required
Solution Approach 1:
The patent employs non-linear polar material-based capacitors (such as ferroelectric or paraelectric materials) to achieve rail-to-rail voltage swings. These composite material capacitors provide the necessary non-linear charge-voltage characteristics to drive the output node to full voltage rails while reducing leakage, representing an advancement in capacitor material technology for logic gate applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in compact, low-power logic gates with reduced interconnect length, enabling efficient operation and intermittent power usage without data loss, suitable for various transistor technologies and complex circuit designs.
Implementation Method 1
capacitors with non-linear polar material to receive first, second, and third inputs
Implementation Method 2
non-linear polar material-based capacitors in logic gates
Data Source
AI summary
A new class of logic gates are presented that use non-linear polar material. The logic gates include multi-input majority gates. Input signals in the form of digital signals are driven to non-linear input capacitors on their respective first terminals. The second terminals of the non-linear input capacitors are coupled a summing node which provides a majority function of the inputs. The majority node is then coupled driver circuitry which can be any suitable logic gate such as a buffer, inverter, NAND gate, NOR gate, etc. In the multi-input majority or minority gates, the non-linear charge response from the non-linear input capacitors results in output voltages close to or at rail-to-rail voltage levels. Bringing the majority output close to rail-to-rail voltage eliminates the high leakage problem faced from majority gates formed using linear input capacitors.