Nonlinear Via Arrays for Thin Film Resistor Offset Reduction

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Solution Overview

Problem

High precision integrated circuits face limitations in achieving accurate thin film resistor matching due to manufacturing process capabilities and layout topology, leading to systematic errors, and current methods like laser trimming are costly and impractical for precise adjustments.

Innovation Solution

A thin film resistor structure and technique that modifies the location of conductive vias by a minimum address unit on the mask set reticle, allowing for precise adjustments without the need for precise measurements of reticle features, enabling high accuracy resistor ratios without laser trimming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If laser trimming is used to adjust thin film resistor values, then manufacturing precision of resistor ratios is improved, but manufacturing cost increases significantly

Engineering Contradiction:
Improveresistor ratio accuracyVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by pre-configuring nonlinear via arrays and head sections during the mask fabrication stage, rather than performing adjustments after resistor deposition. The reticle is designed with built-in nonlinear spacing patterns that enable post-fabrication adjustment of effective resistor length through selective via connection, eliminating the need for costly laser trimming while maintaining high precision resistor ratio control.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If linear via locations are modified by integer grid increments to adjust resistance, then ease of manufacture is improved, but manufacturing precision of resistor ratios deteriorates

Engineering Contradiction:
Improvemask modification simplicityVSAvoidresistor ratio accuracy
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies curvature by replacing linear via arrays with nonlinear via arrays where via positions follow curved or non-uniform spacing patterns. This nonlinear arrangement allows the effective resistor length to be adjusted in fine increments beyond integer grid steps, achieving high precision resistor ratio control while still using standard photolithography processes without requiring expensive precision measurement equipment.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent extends the adjustment mechanism from one-dimensional linear via shifts to two-dimensional nonlinear via positioning within head sections. By allowing via placement in multiple positions within enlarged head sections and using nonlinear spacing patterns, the system achieves finer resolution in effective length adjustment while maintaining compatibility with standard manufacturing grid systems.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If reticle features are magnified by 5x for photolithography, then ease of manufacture is improved, but measurement precision of reticle features deteriorates

Engineering Contradiction:
Improvephotolithography processabilityVSAvoidreticle feature measurement accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent applies segmentation by dividing the resistor structure into multiple discrete via arrays and head sections, where each segment can be independently positioned. This segmentation allows the use of larger, more easily manufacturable reticle features (5x magnification) while achieving fine effective length control through the relative positioning of multiple segments, eliminating the need for ultra-precise measurement of individual small features.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces the head section as an intermediary structure between the via and the resistor body. The head section acts as a positioning buffer that decouples the reticle feature size from the effective length control resolution, allowing large easily-manufactured reticle features to be used while still achieving fine adjustment resolution through the nonlinear via array geometry within the head section.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Manufacturing precision

If multiple laser trimmings at different temperatures are performed, then manufacturing precision of resistor ratios is improved, but manufacturing cost and time increase

Engineering Contradiction:
Improveresistor ratio accuracyVSAvoidtrimming cycle time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs all necessary adjustment geometry preparations during the initial mask fabrication stage, incorporating nonlinear via arrays and head section designs that account for thermal and process variations. This preliminary configuration eliminates the need for subsequent temperature-dependent trimming cycles, reducing both time and cost while maintaining precision through the built-in nonlinear geometry that compensates for process variations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7449783B2Nonlinear via arrays for resistors to reduce systematic circuit offsets
Publication Date: 2008.11.11 TEXAS INSTRUMENTS INC
  • US7449783B2 patent drawing
  • US7449783B2 patent drawing
  • US7449783B2 patent drawing

AI summary

A thin film resistor structure includes a plurality of thin film resistor sections. Conductive vias (5) are disposed on a first end of each of the thin film resistor sections, respectively. The first conductor (2) is connected to the vias of the first end, and a second conductor (3) is connected to vias on a second end of each of the thin film resistor sections. A distribution of a parameter of a batch of circuits including the thin film resistor structure indicates a systematic error in resistance values. Based on analysis of the distribution and the circuit, or more of the vias are individually moved at the layout grid level by a layout grid address unit to reduce the systematic error by making corresponding adjustments on a via reticle of a mask set used for making the circuits. Expensive laser trimming of thin film resistors of the circuit is thereby avoided.