Non-uniform Gate Oxide Thickness for DRAM Leakage Control
Solution Overview
Problem
In semiconductor devices like DRAM, achieving a balance between high current driving capability and low gate-induced drain leakage (GIDL) is challenging due to the need for a suitable gate oxide thickness and doping density, which is difficult to achieve with existing uniform gate oxide layers.
Innovation Solution
A non-uniform gate oxide layer is formed by performing ion implants at varying angles and energies on a finned substrate with a recess, resulting in a thicker oxide layer at the top section of the sidewall surface compared to the bottom section, reducing GIDL and improving charge retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the gate oxide layer is made uniformly thick, then junction leakage is reduced, but gate control over the sub-threshold region deteriorates
Solution Approach 1:
The patent applies local quality by creating a non-uniform gate oxide thickness profile where the oxide is thicker at the top section of the sidewall surface and thinner at the bottom section. This localized variation in thickness allows different regions to serve different functions: the thicker top region reduces GIDL while the thinner bottom region maintains gate control, resolving the contradiction between reducing leakage and maintaining operational control.
2Ease of operation
If the gate oxide layer is made uniformly thin, then gate control is improved, but junction leakage increases
Solution Approach 1:
The patent implements local quality by varying the gate oxide thickness across different regions of the sidewall surface. The thinner oxide at the bottom section maintains good gate control for sub-threshold operation, while the thicker oxide at the top section reduces GIDL, thereby resolving the contradiction between achieving thin oxide benefits and avoiding leakage problems.
3Ease of manufacture
If ion implantation is performed at a single angle, then process simplicity is maintained, but non-uniform oxide thickness cannot be achieved
Solution Approach 1:
The patent applies dynamics by varying the ion implantation angle during the fabrication process. Instead of using a fixed implantation angle, the process dynamically adjusts the angle to create different oxide thicknesses at different locations on the sidewall surface, enabling the formation of the desired non-uniform profile while maintaining process control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces GIDL and enhances charge retention in DRAM devices by creating a localized thicker gate oxide layer at the top section, while maintaining structural integrity and minimizing damage to the substrate.
Implementation Method 1
performing an ion implant into a sidewall surface of the recess to form a gate oxide layer
Implementation Method 2
the finned substrate is also exposed to a plasma, either during or after, the ion implantation
Data Source
AI summary
Provided herein are approaches for forming a gate oxide layer for a DRAM device, the method including providing a finned substrate having a recess formed therein, and performing an ion implant into a sidewall surface of the recess to form a gate oxide layer having a non-uniform thickness, wherein a thickness of the gate oxide layer at a top section of the sidewall surface is greater than a thickness of the gate oxide layer at a bottom section of the sidewall surface. In some approaches, the ion implant is provided as a series of ion implants at multiple different implant angles, varied along with an ion implantation energy and/or an ion dose to increase the thickness of the gate oxide of the top section of the sidewall surface. In some approaches, the finned substrate is also exposed to a plasma, either during or after, the ion implantation.