Non-uniform Substrate Stackup for Signal Integrity
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Solution Overview
Problem
Conventional semiconductor device packaging designs face challenges in maintaining signal integrity due to improper arrangement of conductive paths, leading to issues like crosstalk and signal loss, which are exacerbated by uniform thicknesses of traces and dielectrics in the substrate.
Innovation Solution
The use of non-uniform thicknesses for traces and dielectrics in different layers of the substrate allows for controlled crosstalk and signal loss, with specific thicknesses selected for traces carrying single-ended or differential signals to optimize signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If uniform thicknesses of traces and dielectrics are used in the substrate, then manufacturing is simplified and consistent, but signal integrity deteriorates due to increased crosstalk and signal loss
Solution Approach 1:
The patent applies local quality by implementing non-uniform thicknesses for traces and dielectrics in specific regions of the substrate. Different sections of the substrate have differently thick traces and dielectric layers tailored to local signal requirements, allowing optimization of signal integrity in critical areas while maintaining manufacturing feasibility through controlled variations rather than complete uniformity.
Solution Approach 2:
The patent changes the thickness parameter of traces and dielectrics from uniform to non-uniform values. By varying the thickness parameter across different regions and layers of the substrate, the patent achieves better control over signal characteristics such as impedance and crosstalk, thereby improving signal integrity while still following manufacturing constraints.
2Device complexity
If improper arrangement of conductive paths is used, then device layout is simpler, but signal integrity suffers due to crosstalk and signal loss
Solution Approach 1:
The patent implements local quality by arranging conductive paths with different characteristics in different regions. Critical signal paths have optimized spacing and thickness while less critical paths have standard arrangements, allowing simple overall layout while maintaining signal integrity where needed through localized optimization.
Solution Approach 2:
The patent utilizes multiple layers (vertical dimension) to route conductive paths, allowing signals to be separated in the vertical dimension when horizontal separation is insufficient. This multi-dimensional arrangement reduces crosstalk and signal loss without significantly increasing planar layout complexity.
3Reliability
If non-uniform thicknesses of traces and dielectrics are implemented, then signal integrity is improved by controlling crosstalk and signal loss, but manufacturing complexity increases
Solution Approach 1:
The patent changes thickness parameters of traces and dielectrics to non-uniform values to improve signal integrity. By carefully controlling and varying these parameters in specific regions, the patent achieves better signal characteristics while managing manufacturing complexity through targeted parameter changes rather than complete redesign of the entire substrate structure.
Data Source
AI summary
Some embodiments described herein include apparatuses and methods of forming such apparatuses. One such embodiment may include a routing arrangement having pads to be coupled to a semiconductor die, with a first trace coupled to a first pad among the pads, and a second trace coupled to a second pad among the pads. The first and second traces may have different thicknesses. Other embodiments including additional apparatuses and methods are described.