Non-Volatile C-Element Circuit Using Resistive Backup Memory
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Solution Overview
Problem
Asynchronous circuits lack non-volatile memory for data storage, leading to data loss when powered down, and existing solutions increase energy consumption.
Innovation Solution
A C-element with cross-coupled inverters and non-volatile memory using programmable resistive elements, such as spin transfer torque or phase change elements, that store data by relative resistances, allowing data backup and restore phases using existing transistors during specific logic levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a non-volatile memory is added to the C-element for data backup, then data retention capability is improved, but device complexity increases
Solution Approach 1:
The patent merges the volatile storage function (latch) and non-volatile storage function (resistive memory) into a single integrated C-element structure. The resistive elements are coupled directly to the storage nodes of the latch through transistors, creating a unified circuit that performs both volatile and non-volatile storage without requiring separate independent memory blocks, thereby improving data retention while limiting complexity increase.
Solution Approach 2:
The resistive memory elements serve multiple functions: they act as non-volatile storage during power cycles, provide data backup during operation, and enable state restoration. The same resistive elements and associated transistors are used for both data retention and data restoration functions, reducing the need for additional dedicated components and mitigating complexity increases.
2Reliability
If a non-volatile memory is added to the C-element for data backup, then data retention capability is improved, but energy consumption increases
Solution Approach 1:
The patent implements periodic backup operations where data is transferred from the volatile latch to the non-volatile resistive memory at specific intervals or under certain conditions (e.g., before power down). This periodic action allows the system to maintain data retention capability while avoiding continuous energy consumption associated with constant data writing to non-volatile memory, thus balancing reliability improvement with energy consumption management.
Solution Approach 2:
The C-element circuit uses its own internal transistors and existing signal paths to perform the data backup operation to the resistive memory, rather than requiring external control logic or additional dedicated write circuits. The existing inverter and latch transistors are repurposed for the backup function, eliminating the need for separate energy-consuming control infrastructure and reducing overall energy consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables non-volatile data storage in asynchronous circuits without significant energy consumption increase, maintaining data integrity during power cycles.
Implementation Method 1
at least one of the first and second resistive elements being programmable to have one of at least two resistive states, a data value being represented by the relative resistances of the first and second resistive elements
Implementation Method 2
a first spin transfer torque element having a first terminal coupled to the first storage node; a second spin transfer torque element having a first terminal coupled to the second storage node
Implementation Method 3
a first phase change element having a first terminal coupled to the first storage node; a second phase change element having a first terminal coupled to the second storage node
Data Source
AI summary
The invention concerns a circuit comprising: a C-element having first and second input nodes and first and second inverters (110, 112) cross-coupled between first and second complementary storage nodes (Q, Z), the second storage node (Z) forming an output node of the C-element; and a non-volatile memory comprising: a first resistive element (202) having a first terminal coupled to the first storage node (Q); a second resistive element (204) having a first terminal coupled to the second storage node (Z), at least one of the first and second resistive elements being programmable to have one of at least two resistive states (Rmin, Rmax), wherein a second terminal of the first resistive element (202) is coupled to a second terminal of the second resistive element (204) via a first transistor (210); and a control circuit (232).


