Non-Volatile Cache for Unaligned Data Packet Storage

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Solution Overview

Problem

Current data storage devices face inefficiencies in transferring and managing data associated with logical block addresses (LBAs), particularly when dealing with unaligned data packets that do not match the allocated storage capacity of physical destination locations, which affects performance and storage management.

Innovation Solution

Implementing a method that involves temporarily storing data packets in a non-volatile cache memory before transferring them to a first cache memory, where they are processed and stored in physical destination locations, using a read-modify-write process that considers proximity between LBAs to optimize data transfer and storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data packets are directly transferred to physical destination locations, then data transfer speed is improved, but data storage management efficiency deteriorates due to unaligned packet sizes

Engineering Contradiction:
Improvedata transfer speedVSAvoidstorage management efficiency
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

A cache memory is introduced as an intermediary between the data interface and physical destination locations. Data packets are first stored in the cache memory, allowing the system to buffer unaligned packets and manage them before final storage, thus resolving the conflict between transfer speed and management efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Data packets are temporarily stored in cache memory before being transferred to physical destination locations. This preliminary action allows the system to prepare and organize data packets, aligning them with destination requirements before actual storage operations commence.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If unaligned data packets are processed individually, then data accuracy is improved, but processing time increases

Engineering Contradiction:
Improvedata storage accuracyVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

Multiple unaligned data packets are merged and stored together in the cache memory. By combining multiple packets into a unified buffer, the system can process them collectively rather than individually, reducing total processing time while maintaining data accuracy through proper cache management.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If cache memory is used to buffer data packets, then storage management efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvestorage management efficiencyVSAvoidmemory structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The cache memory serves multiple functions: it acts as a buffer for unaligned packets, a temporary storage location for data management operations, and a coordination point between the data interface and physical destinations. This multi-functionality justifies the added complexity by providing comprehensive storage management capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9921774B2Data storage management in a memory device
Publication Date: 2018.03.20 SEAGATE TECH LLC
  • US9921774B2 patent drawing
  • US9921774B2 patent drawing
  • US9921774B2 patent drawing

AI summary

The disclosure is related to systems and methods of managing data storage in a memory device. In a particular embodiment, a method is disclosed that includes receiving, in a data storage device, at least one data packet that has a size that is different from an allocated storage capacity of at least one physical destination location on a data storage medium in the data storage device for the at least one data packet. The method also includes storing the at least one received data packet in a non-volatile cache memory prior to transferring the at least one received data packet to the at least one physical destination location.