Nonvolatile Cache Memory Segmentation for Speed-Capacity Trade-off
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Solution Overview
Problem
Cache memory systems using nonvolatile memories like MRAM face a trade-off between memory capacity and access speed, leading to potential performance drops when used in lower-level cache positions, as they are outpaced by SRAM in access speed.
Innovation Solution
Implementing a cache memory system with a nonvolatile memory that can generate multiple regions of different access speeds and using a cache controller to dynamically sort data based on access conditions between a high-speed and low-speed region within the L2 cache, allowing for efficient allocation and switching of memory capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If nonvolatile memory (MRAM) is used for cache memory to reduce standby energy and cost, then memory capacity can be increased, but access speed deteriorates compared to SRAM
Solution Approach 1:
The L2 cache is divided into multiple regions (first region and second region) with different access speeds. The first region uses faster memory cells while the second region uses slower memory cells, allowing the system to segment the memory capacity to balance between access speed and capacity requirements.
Solution Approach 2:
Different regions within the L2 cache are assigned different access speeds based on local requirements. Frequently accessed data is stored in the first region with higher access speed, while less frequently accessed data is stored in the second region with lower access speed, optimizing the trade-off locally.
2Use of energy by stationary object
If nonvolatile memory is used in lower-level cache positions, then cost and standby energy are reduced, but processing performance deteriorates due to slower access speed
Solution Approach 1:
The cache memory is segmented into multiple regions with different performance characteristics. The first region provides high-speed access for critical data, while the second region provides capacity storage for less critical data, allowing the system to maintain processing performance while using cost-effective nonvolatile memory.
Solution Approach 2:
The system changes the access speed parameter by selecting different memory cells with different characteristics based on data access patterns. This allows optimization of the balance between processing performance and energy consumption.
3Quantity of substance
If memory capacity is increased to improve data storage, then access speed deteriorates due to larger memory size
Solution Approach 1:
The memory capacity is segmented into multiple regions with different access speeds. The first region stores frequently accessed data with high access speed, while the second region stores less frequently accessed data with lower access speed, resolving the trade-off between total capacity and access speed.
Solution Approach 2:
Different parts of the memory are assigned different quality levels (access speeds) based on the importance and access frequency of the data stored there, allowing the system to achieve both high capacity and high access speed where needed.
Data Source
AI summary
A cache memory system has a first cache memory, a second cache memory which comprises a nonvolatile memory capable of generating a plurality of regions having different access speeds and has access priority lower than the first cache memory, and a cache controller which carries out a control where data to be stored in the second cache memory is sorted to the plurality of regions and stored thereto in accordance with access conditions with respect to the first cache memory.