Non-Volatile Flip-Flop Backup for Intermittent Power Logic
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Solution Overview
Problem
Conventional microelectronic systems face challenges in managing intermittent energy from ambient energy sources due to the volatile nature of digital technology, leading to energy inefficiencies and long backup times when power is disrupted, especially in systems powered by energy harvesting technologies.
Innovation Solution
Implementing a non-volatile logic device with on-chip storage using spin-transfer torque magnetic tunnel junctions (STT-MTJ) or other compatible devices, allowing each register in a processing unit to function as a non-volatile flip-flop that stores its state locally before a power failure, enabling near-instant backup and restoration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional volatile logic devices are used with off-chip non-volatile memory for state backup, then non-volatile storage capability is achieved, but backup time and energy consumption increase significantly
Solution Approach 1:
The patent merges volatile logic functionality with non-volatile storage by integrating a non-volatile memory cell directly into the flip-flop structure. The non-volatile cell is coupled to the volatile flip-flop outputs, allowing simultaneous logic operation and persistent state storage on the same chip, eliminating the need for separate off-chip backup operations.
Solution Approach 2:
The non-volatile storage function is segmented into individual memory cells that are distributed across the chip alongside logic elements. Each non-volatile cell is locally coupled to specific flip-flops, enabling parallel backup operations across multiple segments of the circuit rather than centralized sequential backup.
2Reliability
If conventional volatile logic devices are used with off-chip non-volatile memory for state backup, then non-volatile storage capability is achieved, but energy consumption increases
Solution Approach 1:
The patent merges volatile logic functionality with non-volatile storage by integrating a non-volatile memory cell directly into the flip-flop structure. The non-volatile cell is coupled to the volatile flip-flop outputs, allowing simultaneous logic operation and persistent state storage on the same chip, eliminating the need for separate off-chip backup operations.
Solution Approach 2:
The patent extracts the non-volatile storage function from off-chip memory and embeds it within the logic circuitry itself. By taking out the backup operation from the external domain and integrating it into the chip's internal structure, the system eliminates energy-consuming data transfer between chip and external memory.
3Ease of manufacture
If fixed backup time is used for all chips, then manufacturing simplicity is maintained, but energy wastage occurs due to process variations
Solution Approach 1:
The patent introduces dynamic backup time adjustment by incorporating a scan chain that allows measurement of actual backup time for each individual chip. Based on measured process variations, the backup time parameter can be dynamically tuned for each chip to achieve minimal energy consumption while ensuring reliable backup, moving from a static fixed-time approach to a dynamic adaptive approach.
Solution Approach 2:
The patent implements a feedback mechanism where the actual backup time is measured using a scan chain for each chip, and this measured value is used to adjust the backup time parameter. This closed-loop feedback enables optimization of energy consumption by matching the backup time to the actual process variations of each specific chip rather than using a conservative fixed value for all chips.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution minimizes energy wastage and satisfies yield constraints by allowing per-chip determination of backup time, reducing hardware overhead and improving energy efficiency in systems powered by intermittent energy sources.
Implementation Method 1
The non-volatile logic device employs spin-transfer torque magnetic tunnel junctions (STT-MTJ) as a non-volatile device
Implementation Method 2
A STT-MTJ device may operate with a critical current being delivered for some minimum duration in order to switch a state of the STT-MTJ
Data Source
AI summary
A non-volatile logic device for energy-efficient logic state restoration is disclosed. The non-volatile logic device incorporates a volatile flip-flop and a non-volatile storage unit to achieve on-chip non-volatile storage. The non-volatile logic device further allows for a backup time to be determined on a per-chip basis, resulting in minimizing energy wastage and satisfying a given yield constraint.