Nonvolatile Memory FTL Partitioning for Lower Write Amplification
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Solution Overview
Problem
Existing memory systems with nonvolatile memories face challenges in managing complex control operations, leading to increased resource consumption, degraded I/O performance, and reduced SSD lifespan due to write amplification and noisy neighbor issues, particularly in systems with shared address translation and garbage collection responsibilities between hosts and storage devices.
Innovation Solution
A memory system architecture that shares the role of Flash Translation Layer (FTL) between the host and the flash storage device, where the host manages logical-to-physical address translation and global FTL functions, while the flash storage device handles low-level abstraction, including garbage collection and defective page handling, to optimize resource usage and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the host manages all FTL functions including address translation and garbage collection, then control flexibility is improved, but device complexity and resource consumption increase
Solution Approach 1:
The FTL functionality is segmented into two parts: address translation is performed by the host, while garbage collection is performed by the storage device. This segmentation allows each component to handle specific tasks, reducing overall system complexity while maintaining control flexibility.
Solution Approach 2:
A command queue mechanism acts as an intermediary between the host and storage device, enabling coordinated operation. The host manages address translation through logical block addresses, while the storage device autonomously handles garbage collection, reducing direct communication overhead and system complexity.
2Productivity
If the host performs address translation, then I/O performance is improved, but memory resource consumption increases
Solution Approach 1:
The host maintains a mapping table that stores logical-to-physical address translations in host memory rather than requiring large buffers in the storage device. This copying approach allows the host to manage address translation efficiently using available memory resources.
Solution Approach 2:
The system moves address translation from the storage device dimension to the host dimension, allowing the host to utilize its memory resources and processing capabilities for translation tasks, thereby improving I/O performance while distributing memory consumption appropriately.
3Loss of energy
If garbage collection is performed by the storage device, then write amplification is reduced, but control complexity increases
Solution Approach 1:
The storage device autonomously performs garbage collection operations based on commands from the host, managing its own internal block and page operations. This self-service approach reduces write amplification while keeping control complexity localized to the storage device rather than the entire system.
Solution Approach 2:
The host issues garbage collection commands in advance, specifying source and destination blocks. The storage device then autonomously executes the garbage collection by copying valid pages and erasing source blocks, reducing write amplification through pre-planned operations rather than reactive management.
4Duration of action of stationary object
If block-level operations are managed by the storage device, then SSD lifespan is extended, but device complexity increases
Solution Approach 1:
The storage device autonomously manages block-level operations including garbage collection, wear leveling, and bad block management. This self-service capability extends SSD lifespan by optimizing write patterns and distributing wear evenly across blocks without requiring complex host-side management.
Solution Approach 2:
The storage device performs preliminary actions such as pre-allocation of blocks, wear leveling before writes occur, and proactive garbage collection. These preliminary actions extend SSD lifespan by preventing excessive wear on any single block and maintaining optimal write patterns throughout the device lifecycle.
Data Source
AI summary
According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.