Nonvolatile Latch Circuit Using Oxide Semiconductor Transistor
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Solution Overview
Problem
Nonvolatile latch circuits using ferroelectric elements face challenges with reliability of rewrites and voltage reduction, and suffer from high variability due to small remanent polarization, requiring high-accuracy reading circuits.
Innovation Solution
A nonvolatile latch circuit with a loop structure using a transistor with an oxide semiconductor for the channel formation region, connected to a capacitor for data holding, allowing for data writing, holding, and reading, and operating with a low voltage equivalent to the threshold voltage, reducing charge variation and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If a ferroelectric element is used for nonvolatile logic, then data retention without power is achieved, but reliability of rewrites and voltage reduction are compromised
Solution Approach 1:
The circuit is divided into a latch portion with loop structure and a separate data holding portion with oxide semiconductor transistor and capacitor. This segmentation allows the latch to maintain logic functionality while the holding portion provides nonvolatile storage with high reliability, resolving the contradiction between data retention and rewrite reliability.
Solution Approach 2:
The invention changes the material parameter of the transistor from conventional semiconductor to oxide semiconductor, which has extremely low off-state current. This parameter change enables the circuit to achieve both nonvolatile data retention and high rewrite reliability, as the oxide semiconductor maintains stable electrical characteristics over many write cycles.
2Duration of action of stationary object
If remanent polarization is used for data storage, then nonvolatile memory is achieved, but charge variation increases requiring high-accuracy reading circuits
Solution Approach 1:
The invention introduces a capacitor as an intermediary storage element in the data holding portion. The capacitor stores charge with high stability, and the oxide semiconductor transistor controls charge transfer to and from the capacitor with high precision. This intermediary approach eliminates the charge variation problems of ferroelectric elements, allowing simple reading circuits to accurately detect stored data.
3Speed
If conventional transistors are used in latch circuits, then fast switching is achieved, but data retention after power off is lost
Solution Approach 1:
The invention creates a composite circuit structure combining conventional transistors in the latch portion for fast switching with an oxide semiconductor transistor in the data holding portion for ultra-low leakage. This composite approach merges the advantages of both material types, achieving both fast switching performance and long-term data retention without power.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a nonvolatile latch circuit with improved reliability and reduced charge variation, enabling long refresh times and memory retention characteristics similar to nonvolatile memory, while maintaining data integrity even after power is turned off.
Implementation Method 1
A channel formation region of the transistor includes an oxide semiconductor layer
Implementation Method 2
The data holding portion includes a capacitor which is electrically connected to a source electrode or a drain electrode of the transistor
Data Source
AI summary
To provide a novel nonvolatile latch circuit and a semiconductor device using the nonvolatile latch circuit, a nonvolatile latch circuit includes a latch portion having a loop structure where an output of a first element is electrically connected to an input of a second element, and an output of the second element is electrically connected to an input of the first element; and a data holding portion configured to hold data of the latch portion. In the data holding portion, a transistor using an oxide semiconductor as a semiconductor material for forming a channel formation region is used as a switching element. In addition, a capacitor electrically connected to a source electrode or a drain electrode of the transistor is included.