Nonvolatile Memory Read Control with Adaptive Ramping for Channel Boosting
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Nonvolatile memory devices face challenges in maintaining a consistent channel boosting level when the voltage level of an external voltage varies, leading to hot carrier injection and degradation of string and ground selection transistors.
Innovation Solution
The method involves detecting the voltage level of an external voltage and adaptively adjusting the ramping period for setting up word-line voltages, applying a read pass voltage to unselected word-lines during a sensing period, and maintaining a consistent boosting potential by varying the application time of a pre-pulse based on the detected voltage level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the ramping period is fixed regardless of external voltage variations, then the device complexity is reduced, but the channel boosting level cannot be maintained consistently leading to hot carrier injection and transistor degradation
Solution Approach 1:
The patent implements a feedback mechanism where the actual voltage level is detected and used to adjust the ramping period dynamically. The control circuit monitors the external voltage level and modifies the ramping duration accordingly, ensuring that the channel boosting level remains consistent even when external voltage varies, thereby preventing hot carrier injection and transistor degradation.
Solution Approach 2:
The patent transitions from a fixed, static ramping period to a dynamic, adaptive ramping period that changes based on detected voltage levels. This dynamic adjustment allows the system to maintain optimal channel boosting conditions under varying external voltage conditions, resolving the contradiction between reliability and complexity by making the control system adaptive rather than rigid.
2Reliability
If the ramping period is extended to ensure adequate voltage establishment, then voltage stability is improved, but the read operation speed decreases
Solution Approach 1:
The patent employs dynamic adjustment of the ramping period based on detected voltage levels. When voltage levels are high, the ramping period is shortened to maintain fast read speeds. When voltage levels are low, the ramping period is extended to ensure adequate voltage establishment and stability. This dynamic adaptation resolves the contradiction by optimizing the ramping period for each specific voltage condition rather than using a conservative fixed value.
Solution Approach 2:
The patent changes the ramping period parameter dynamically based on the detected external voltage level. By adjusting this temporal parameter according to voltage conditions, the system achieves both voltage stability and fast read speeds - using shorter ramping periods when voltage is high and longer periods when voltage is low, thus resolving the speed-stability tradeoff.
3Productivity
If the ramping period is shortened to increase read speed, then productivity is improved, but voltage instability occurs leading to inconsistent channel boosting
Solution Approach 1:
The patent implements a dynamic control system that adjusts the ramping period based on real-time voltage detection. When external voltage levels are high, the system safely uses shorter ramping periods to maintain fast read speeds without compromising voltage stability. When voltage levels are low, the system automatically extends the ramping period to ensure stable voltage establishment. This dynamic adaptation resolves the contradiction between productivity and reliability.
Solution Approach 2:
The patent uses feedback from voltage detection to control the ramping period duration. The control circuit receives feedback about the external voltage level and adjusts the ramping period accordingly - shortening it when voltage is high to maximize speed, and lengthening it when voltage is low to maintain stability. This closed-loop control resolves the speed-stability contradiction by making read speed optimization conditional on voltage stability.
Data Source
AI summary
In a method of operating a nonvolatile memory device that includes a memory block, a voltage level of an external voltage from an external memory controller is detected while receiving a read command sequence from the external memory controller, each of a plurality of word-lines coupled to the plurality of memory cells is set up to a respective target level during a word-line set-up period while adaptively adjusting a ramping period during which a read pass voltage ramps to a target level based on the detected voltage level, a sensing operation is performed on target memory cells by applying a read voltage to a selected word-line coupled to the target memory cells, among the plurality of word-lines while applying the read pass voltage to unselected word-lines among the plurality of word-lines during a sensing period, and sensed data obtained by the sensing operation is outputted.


