Non-Volatile Memory Reading with Adaptive Reference Values
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Solution Overview
Problem
Existing methods for reading data from non-volatile memory, particularly sensitive data like trimming bits, are prone to errors due to sub-optimal reference values during power-on, leading to incorrect readings and potential device malfunctions, and existing techniques like majority voting and error correction codes increase memory complexity and area.
Innovation Solution
A method that uses at least two memory cells to store each bit of sensitive data, adjusting a reference value between the distributions of electrical properties to reliably read the bit value, allowing correct and reliable data reading without error correction codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a default reference value is used for reading operations at power-on, then the read operation can be performed, but the reading result may be incorrect due to sub-optimal reference values
Solution Approach 1:
The patent applies preliminary action by performing a calibration phase before the actual read operation. The system first determines an optimal reference value by comparing read results from multiple memory cells and identifying the reference value that produces the most consistent readings. This pre-determined optimal reference value is then used for the actual read operation, ensuring accuracy without adding complexity to the main read path.
2Reliability
If majority voting technique is used to read trimming bits, then reading reliability is improved, but memory area and device complexity increase
Solution Approach 1:
The patent changes the parameter being optimized from the reference value itself to the distribution characteristics of memory cell currents. By analyzing the statistical distribution of current values across multiple memory cells and determining an optimal reference value based on these distributions, the system achieves reliable reading without requiring multiple copies of each bit or complex voting logic.
3Reliability
If error correction code is used to write and read trimming bits, then data integrity is improved, but memory complexity and area increase
Solution Approach 1:
The patent extracts the error correction function from the traditional ECC approach and implements it through a simplified reference value determination mechanism. Instead of using full ECC encoding and decoding circuits, the system extracts only the essential function of error detection and correction by comparing read results against an optimally determined reference value, thereby achieving data integrity with minimal added complexity.
4Adaptability or versatility
If power supply value differs from specification during power-on, then memory device can operate with varying power conditions, but reading of sensible data becomes incorrect
Solution Approach 1:
The patent applies dynamics by making the reference value adaptive rather than static. The reference value is dynamically determined based on the actual characteristics of the memory cells at the time of reading, taking into account variations in power supply conditions, temperature, and device aging. This dynamic adaptation ensures that the reference value remains optimal even when operating conditions deviate from specifications.
Data Source
AI summary
A method for reading data from a non-volatile memory array having memory cells configured to store one bit information, including powering on the array, where information from at least first and second memory cells is collectively associated with one bit of sensible data; reading first and second memory cell values by comparing a reference value to an electrical property value of the respective memory cell; adjusting the reference value when at least the first and second memory cell values have a first combination of logic state values; reading the first and second memory cell values using the adjusted reference value to obtain a second combination of logic state values; and determining a sensible data bit value based on the second combination. The adjusted reference value lies in the space between first and second distributions of possible electrical property values respectively for the first and second memory cell values.


