Nonvolatile Memory Bad Block Replacement Across Planes

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Solution Overview

Problem

Flash memory devices often encounter defective or bad blocks due to manufacturing or operational issues, leading to reduced performance and available capacity, as these blocks cannot store data normally.

Innovation Solution

A nonvolatile memory device with a dual-plane structure, including an address replacing circuit that receives input addresses and outputs replaced addresses based on bad block information, allowing for the normal operation of memory blocks by replacing defective blocks with functional ones within the same or different planes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bad blocks are replaced with functional blocks from the same plane, then reliability is improved, but available capacity of the plane is reduced

Engineering Contradiction:
ImprovereliabilityVSAvoidavailable capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extends bad block replacement from a single-plane system to a multi-plane system. When a bad block is detected in a first plane, the address replacing circuit can map it to a functional block in a second plane, thereby utilizing the third dimension (plane dimension) to resolve the capacity loss problem within a plane.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The address replacing circuit acts as an intermediary between the controller and the memory planes. It intercepts address requests, identifies bad blocks, and transparently redirects them to functional blocks in other planes, allowing the controller to operate normally without knowing about the underlying plane structure or bad blocks.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If bad blocks are replaced with functional blocks from different planes, then available capacity is maintained, but device complexity increases

Engineering Contradiction:
Improveavailable capacityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The address replacing circuit is designed with universal functionality to handle bad block replacement across multiple planes. It maintains a bad block information structure that can store mappings for any plane, and the replacement logic works uniformly regardless of which plane the bad block is in, making the system scalable to N planes without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent creates a virtual copy of the address space through the address replacing circuit. The circuit maintains a mapping table that copies bad block addresses from one plane to corresponding addresses in another plane, allowing the system to present a unified address space to the controller while handling the complexity internally.

Inventive Principle:
Principle #26Copying

3Productivity

If multiple planes are used for bad block replacement, then productivity is improved, but manufacturing precision requirements increase

Engineering Contradiction:
ImproveproductivityVSAvoidmanufacturing precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The memory device is segmented into multiple independent planes, each with its own set of memory blocks. This segmentation allows bad blocks in one plane to be replaced by functional blocks in another plane, thereby maintaining overall productivity. The segmentation isolates manufacturing defects to specific planes rather than affecting the entire device.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12293098B2Nonvolatile memory device and operation method thereof
Publication Date: 2025.05.06 SAMSUNG ELECTRONICS CO LTD
  • US12293098B2 patent drawing
  • US12293098B2 patent drawing
  • US12293098B2 patent drawing

AI summary

Disclosed is a nonvolatile memory device which includes a first plane that includes a plurality of memory blocks, a second plane that includes a plurality of memory blocks, an address replacing circuit that receives a first input address from an external controller, the first input address corresponding to a first memory block of the plurality of memory blocks of the first plane from an external controller and outputs a replaced address based on the first input address and bad block information, and an address decoder that controls word lines connected with a second memory block based on the replaced address, the word lines corresponding to the replaced address from among the plurality of memory blocks of the second plane. The first memory block of the first plane is a bad block.