Nonvolatile Memory Verification Using Bit Line Precharge
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Solution Overview
Problem
The time required for verification operations in nonvolatile memory devices increases with the number of programmed bits, and the reliability of program verification operations is compromised due to leakage currents affecting bit line voltage levels.
Innovation Solution
Consecutively performing verification operations after precharging bit lines and adjusting sense pulses to account for leakage currents, using multiple verification voltages to detect threshold voltage levels in nonvolatile memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If verification operations are performed for each programmed bit, then programming reliability is improved, but verification time increases significantly
Solution Approach 1:
The bit line is precharged to a reference voltage level before verification operations begin. This preliminary action establishes a baseline state that enables subsequent verification without requiring repeated precharging for each verification operation, thereby reducing total verification time while maintaining reliability
Solution Approach 2:
Multiple verification operations are performed consecutively on the same precharged bit line without interrupting the precharge state. The verification process continues continuously by applying different verification voltages to the word line and sensing the bit line voltage changes, eliminating the need to reset and precharge the bit line between verifications
2Measurement precision
If bit line precharge voltage is increased to improve verification sensitivity, then detection precision is improved, but leakage current effects are amplified
Solution Approach 1:
The bit line precharge voltage is set to a level that is sufficiently high to ensure reliable detection of threshold voltage changes, but not excessively high to cause problematic leakage currents. The verification process uses multiple voltage levels applied to the word line to detect programmed states at different threshold levels, achieving accurate detection without requiring excessive precharge voltage that would amplify leakage effects
Solution Approach 2:
The verification process employs multiple verification voltages applied to the word line (e.g., first verification voltage for first threshold level, second verification voltage for second threshold level). By changing the verification voltage parameter rather than continuously increasing bit line precharge voltage, the system achieves improved detection precision across different programming states without proportionally increasing leakage current problems
Data Source
AI summary
A method of operating a nonvolatile memory device includes precharging bit lines coupled to strings, supplying a first verification voltage to a selected word line and supplying a pass voltage to word lines other than the selected word line, supplying a first sense pulse to switching elements coupled between the bit lines and sense nodes and detecting memory cells, each having a threshold voltage higher than the first verification voltage, supplying a second verification voltage higher than the first verification voltage to the selected word line and supplying the pass voltage to the word lines other than the selected word line, and supplying a second sense pulse to the switching elements and detecting memory cells, each having a threshold voltage higher than the second verification voltage.