Nonvolatile Memory Impedance Calibration Verification
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Solution Overview
Problem
As semiconductor memory devices operate at increased speeds, signal swing widths decrease, making them more susceptible to distortion due to impedance mismatches caused by process, voltage, and temperature variations, necessitating effective impedance calibration but often resulting in inefficiencies and reduced data throughput.
Innovation Solution
A method for a nonvolatile memory device that performs an impedance calibration verifying operation based on data read commands, determining if impedance calibration is normal, storing detection values, and selectively performing data read or impedance calibration operations based on these values, using an impedance calibration circuit and pass/fail detection circuit to ensure optimal impedance settings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If impedance calibration operation is performed to adjust output impedance and termination impedance, then signal transmission reliability is improved, but command overhead increases and data throughput decreases
Solution Approach 1:
The patent performs impedance calibration verifying operation in advance before data read operations. The detection value indicating calibration status is determined beforehand and stored, allowing the system to skip redundant calibration operations and proceed directly to data operations, thus improving throughput while maintaining reliability
Solution Approach 2:
The patent introduces a feedback mechanism where the detection value from impedance calibration verifying operation is used to control subsequent data read operations. The memory device monitors its own calibration status and adjusts its operation accordingly, performing calibration only when necessary rather than continuously, thereby balancing reliability with throughput efficiency
2Reliability
If impedance calibration operation is performed frequently to maintain accurate impedance settings, then signal quality is improved, but operational speed decreases
Solution Approach 1:
The memory device performs self-verification of impedance calibration status through the detection value without requiring external intervention for each calibration check. The device autonomously determines whether calibration is needed based on its internal state, reducing unnecessary operations and maintaining speed while ensuring signal quality
3Measurement precision
If impedance calibration verifying operation is performed before each data read operation, then calibration accuracy is ensured, but command overhead increases
Solution Approach 1:
Instead of performing full impedance calibration before every data read operation, the patent implements a lighter verification operation that checks calibration status using detection values. This partial action approach maintains sufficient calibration accuracy for normal operations while avoiding the time penalty of complete recalibration, reducing command overhead significantly
Data Source
AI summary
In a method of operating a nonvolatile memory device, an impedance calibration verifying operation is performed based on a data read command. The impedance calibration verifying operation ascertains whether an impedance calibration operation is normally performed for a data input/output (I/O) terminal of the nonvolatile memory device. A detection value is stored in a storage unit. The detection value indicates a result of the impedance calibration verifying operation. The detection value is output based on a first command received after the nonvolatile memory device receives the data read command. A data read operation or the impedance calibration operation is selectively performed based on the detection value.