Non-Volatile Memory Circuit Self-Terminating Read Current
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Solution Overview
Problem
Conventional non-volatile memory circuits experience high power dissipation and inefficient energy usage during read cycles due to constant current flow, limiting their energy efficiency and ability to continuously present stored cell states like static random access memory (SRAM).
Innovation Solution
A non-volatile memory circuit design incorporating PMOS and NMOS transistors, memory resistors, and a feedback loop that minimizes current flow during read operations by using a self-terminating read mechanism, allowing for low power consumption and continuous presentation of stored binary bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If conventional voltage divider circuits are used to read non-volatile memory resistance, then the memory state can be continuously presented, but constant current flow causes high power dissipation
Solution Approach 1:
The patent implements a self-terminating read mechanism where the read current flows only during the brief period needed to sense the memory state, then automatically terminates. This periodic action replaces the continuous current flow of conventional voltage divider circuits, dramatically reducing power dissipation while maintaining the ability to continuously present memory states through sequential sampling
Solution Approach 2:
The patent employs a feedback loop that monitors the voltage developed across the memory resistor during the read operation. When the sensed voltage indicates that the memory state has been successfully read, the feedback signal terminates the read current. This feedback mechanism enables automatic current termination while ensuring complete memory state presentation
2Ease of operation
If constant current is used to read non-volatile memory, then simple circuit operation is achieved, but energy efficiency is poor compared to SRAM
Solution Approach 1:
The read circuit is designed to automatically manage its own current flow without external control signals. The self-terminating mechanism uses the memory state itself to control the termination of read current, making the circuit energy-efficient while maintaining operational simplicity. The circuit serves itself by using the sensed voltage to automatically stop current flow
Solution Approach 2:
Instead of continuous current flow, the patent implements periodic current pulses that are automatically generated and terminated. Each pulse corresponds to a memory read operation, providing energy efficiency comparable to SRAM while maintaining the simplicity of operation through automatic pulse generation and termination based on the memory state
Data Source
AI summary
A non-volatile memory circuit includes a first transistor which has a first terminal coupled to a DC voltage supply and has a second terminal and a gate. The memory circuit includes a second transistor which has a first terminal coupled to a reference potential, a second terminal and a gate coupled to the gate of the first transistor. The memory circuit includes a memory resistor circuit which has a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the second terminal of the second transistor and has a third terminal. The memory circuit includes an inverter which has a first terminal coupled to the DC voltage supply, a second terminal coupled to the reference potential and a third terminal coupled to the third terminal of the memory resistor circuit.