Non-volatile Memory Compressed Soft Bit Data Transmission
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Solution Overview
Problem
Current memory systems face challenges in efficiently transmitting data due to the large size of soft bit data, which hinders data transfer speed and increases the amount of data output from non-volatile memory to the memory controller.
Innovation Solution
The non-volatile memory generates and transmits compressed soft bit data by performing OR operations on partial soft bit data from multiple pages, reducing the data size and improving transfer efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If soft bit data is transmitted directly from non-volatile memory to memory controller, then data completeness is maintained, but data transmission size is large and transfer speed is reduced
Solution Approach 1:
The patent merges multiple partial soft bit data sets from different pages into a single compressed soft bit data set by performing OR operations. This combining approach reduces the total data transmission size while maintaining the essential error correction information needed for reliable data recovery, thereby improving data transfer speed without sacrificing data integrity.
Solution Approach 2:
The patent changes the parameter of data representation by transforming full soft bit data into compressed soft bit data through logical operations. This parameter transformation reduces the data size from multiple pages to a compressed form that retains the critical error information, enabling faster transmission while preserving the functional requirements for error correction.
2Quantity of substance
If compressed soft bit data is generated by OR operations on partial soft bit data, then data transmission size is reduced, but processing complexity increases
Solution Approach 1:
The patent performs preliminary actions by pre-processing the soft bit data into partial soft bit data sets during the write operation, organizing them in a manner that facilitates subsequent compression. This preliminary organization reduces the complexity of the compression step, as the data is already structured to enable efficient OR operations and compression without requiring complex real-time processing.
3Productivity
If data transfer speed is increased by reducing data size, then transmission efficiency improves, but data completeness may be compromised
Solution Approach 1:
The patent introduces compressed soft bit data as an intermediary representation that bridges the gap between full soft bit data and hard bit data. This intermediary form retains the essential error correction information in a compressed format, enabling fast transmission while preserving the ability to recover and correct errors in the original data, thus maintaining data completeness.
Data Source
AI summary
A nonvolatile memory includes a memory cell transistor storing information of a plurality of bits including first through third bits, a word line, a sense amplifier unit, and a control circuit which controls the word line and the sense amplifier unit. The control circuit includes first through third latch circuits, and performs plural read operations including a first read operation to read out the first bit into the first latch circuit and generate data in the second and third latch circuits, a second read operation performed after the first read operation to read out the second bit into the first latch circuit and update the data in the second and third latch circuits, and a third read operation performed after the second read operation to read out the third bit into the first latch circuit and update the data in the second and third latch circuits.