Nonvolatile Memory Consolidated Program Command Parallel Write

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Solution Overview

Problem

Existing memory systems face inefficiencies in sequential write operations due to interference between memory regions, leading to reduced performance and increased operational time.

Innovation Solution

A nonvolatile memory device with a control unit that performs consolidated program operations on memory regions coupled to adjacent word lines, minimizing interference by storing data in parallel using a single consolidated program command, rather than separate commands for each data set.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If separate program commands are used for each data set, then each data can be stored individually, but the operational time increases and performance decreases

Engineering Contradiction:
Improvesequential write performanceVSAvoidoperational time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent combines multiple separate program commands into a single consolidated program command that can simultaneously program multiple memory regions. This merging approach allows the controller to transmit and process multiple data sets in parallel, eliminating the sequential time loss associated with executing separate commands for each data set, thereby directly resolving the contradiction between individual data storage capability and operational efficiency

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If multiple memory regions are programmed simultaneously, then write efficiency improves, but interference between memory regions increases

Engineering Contradiction:
Improvewrite efficiencyVSAvoidinterference between memory regions
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by selectively programming specific memory regions based on their coupling relationships with word lines. The controller identifies memory regions that can be simultaneously programmed without mutual interference by analyzing their word line couplings, and targets only those non-interfering regions for parallel programming. This localized approach enables improved write efficiency for compatible regions while avoiding the harmful interference that would occur if all regions were programmed simultaneously regardless of their coupling relationships

Inventive Principle:
Principle #3Local quality

3Loss of time

If a single consolidated program command is used, then waiting times are reduced, but the complexity of managing multiple data sets increases

Engineering Contradiction:
Improvewaiting timesVSAvoidcontrol unit complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by having the controller pre-identify and pre-organize multiple data sets before executing the consolidated program command. The controller analyzes the coupling relationships between memory regions and word lines in advance, selects compatible memory regions for parallel programming, and prepares the necessary control signals beforehand. This preliminary organization eliminates the need for complex real-time decision-making during the programming operation, thereby reducing waiting times while keeping the control unit's operational complexity manageable

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240233827A1Nonvolatile memory device, operating method thereof, and memory system including the same
Publication Date: 2024.07.11 SK HYNIX INC
  • US20240233827A1 patent drawing
  • US20240233827A1 patent drawing
  • US20240233827A1 patent drawing

AI summary

A nonvolatile memory device includes a memory cell array and a control unit. The memory cell array includes a plurality of memory regions coupled to a plurality of word lines. The plurality of memory regions include first and second memory regions coupled to upper and lower word lines, respectively. The control logic performs, after receiving first data and second data, a first program operation on the first memory region to store the first data and a second program operation on the second memory region to store the second data.