Non-Volatile Memory Controller Segmentation for Power Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Computing systems using DRAM integrated circuits face high power consumption and require frequent refresh cycles, while non-volatile memory integrated circuits offer lower power consumption and improved read access times, but with longer write access times, necessitating a different data communication protocol to optimize memory access.
Innovation Solution
Integrating a non-DRAM memory controller into a computer system to manage non-volatile memory modules, which includes converting data strobe signals to status signals for efficient access and reducing polling, and using a dual memory controller setup to handle both DRAM and non-DRAM memory modules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If DRAM integrated circuits are used in main memory, then write access time is short, but power consumption is high and refresh cycles are required
Solution Approach 1:
The system is divided into two separate memory controllers: a DRAM memory controller for volatile memory and a non-DRAM memory controller for non-volatile memory. This segmentation allows each controller to be optimized for its specific memory type, enabling the system to use non-volatile memory for cold storage (reducing power consumption) while maintaining DRAM for active data (ensuring fast write access)
Solution Approach 2:
The patent changes the operational parameters by introducing a specialized non-DRAM memory controller that uses different communication protocols and timing parameters compared to traditional DRAM controllers. This allows non-volatile memory to be accessed efficiently with reduced power consumption while maintaining acceptable performance through parameter optimization
2Use of energy by moving object
If non-volatile memory integrated circuits are used, then power consumption is reduced and read access time is improved, but write access time increases
Solution Approach 1:
Different memory types are assigned to different functional regions: non-volatile memory is used for cold storage and read-intensive operations where power consumption is critical, while DRAM is used for warm cache and write-intensive operations where speed is critical. This local quality assignment optimizes overall system performance by matching memory characteristics to workload requirements
3Adaptability or versatility
If non-DRAM memory modules are integrated, then a different data communication protocol is needed, but this increases device complexity
Solution Approach 1:
The memory control functionality is segmented into separate specialized controllers: one for DRAM and one for non-DRAM memory types. Each controller is designed with dedicated hardware and protocols optimized for its specific memory type, avoiding the complexity of a universal controller that would need to handle multiple memory types through software abstraction layers
Data Source
AI summary
A computing system is disclosed that includes a memory controller in a processor socket normally reserved for a processor. A plurality of non-volatile memory modules may be plugged into memory sockets normally reserved for DRAM memory modules. The non-volatile memory modules may be accessed using a data communication protocol to access the non-volatile memory modules. The memory controller controls read and write accesses to the non-volatile memory modules. The memory sockets are coupled to the processor socket by printed circuit board traces.The data communication protocol to access the non-volatile memory modules is communicated over the printed circuit board traces and through the sockets normally used to access DRAM type memory modules.