Nonvolatile Memory Device With Graded Dielectric Constant
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Solution Overview
Problem
In three-dimensional memory cell arrays, the application of voltage between a bit line and an inter-layer insulating film can cause unintended resistance changes or dielectric breakdown in the variable resistance film, leading to data fluctuations in nonvolatile memory devices.
Innovation Solution
A nonvolatile memory device design featuring a variable resistance film with a higher dielectric constant at its center portion between the bit line and word lines, and an inter-layer insulating film with a graded dielectric constant, which concentrates electric fields near the selected word line, reducing unwanted resistance changes and dielectric breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a continuous variable resistance film is used between bit line and multiple word lines in a three-dimensional memory structure, then memory capacity is increased, but unintended resistance changes or dielectric breakdown occurs in the variable resistance film due to electric field application between bit line and inter-layer insulating film
Solution Approach 1:
The patent applies local quality by creating a spatial variation in dielectric constant within the inter-layer insulating film. Specifically, the dielectric constant is made higher in the center portion between the bit line and word lines compared to the vicinity of the bit line and word lines. This localized property differentiation concentrates the electric field in the center region, preventing electric field-induced resistance changes in the variable resistance film while maintaining the three-dimensional memory structure's high capacity.
2Ease of operation
If voltage is applied between bit line and inter-layer insulating film for memory operation, then memory read/write function is achieved, but electric field causes unintended resistance changes or dielectric breakdown in variable resistance film
Solution Approach 1:
The patent introduces the inter-layer insulating film with spatially varying dielectric constant as an intermediary between the bit line and the variable resistance film. This intermediary structure controls and concentrates the electric field in specific regions (center portion) during memory operations, preventing the electric field from causing harmful effects in the variable resistance film while still enabling necessary memory read/write operations.
3Ease of manufacture
If uniform dielectric constant is used in inter-layer insulating film, then manufacturing is simplified, but electric field is not concentrated near selected word line leading to data fluctuations
Solution Approach 1:
The patent applies parameter changes by varying the dielectric constant parameter within the inter-layer insulating film based on spatial position. The dielectric constant is higher in the center portion between bit line and word lines and lower in the vicinity of bit line and word lines. This parameter variation enables precise electric field control and concentration near the selected word line, improving data stability while maintaining compatibility with existing manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses unintended resistance changes and dielectric breakdown, maintaining data stability by concentrating strong electric fields near the selected word line and reducing fluctuations in memory cells.
Implementation Method 1
a variable resistance film that is continuous in the vertical direction between a bit line and multiple word lines
Implementation Method 2
A dielectric constant of a center portion between the first wiring and the second wiring in the second direction is higher than at a vicinity of the first wiring and a vicinity of the second wiring
Data Source
AI summary
According to an embodiment, a nonvolatile memory device includes a first wiring extending to a first direction, a second wiring disposed on the first wiring in a second direction which is orthogonal to the first direction, a first insulating film provided between the first wiring and the second wiring, a bit line extending in the second direction, and a variable resistance film contacting an end portion of the first wiring, an end portion of the second wiring, and an end portion of the first insulating film. A dielectric constant of a center portion between the first and second wirings in the second direction is higher than at vicinities of the first and the second wirings. The variable resistance film is disposed between the bit line and the first wiring, between the bit line and the second wiring, and between the bit line and the first insulating film.