Nonvolatile Memory Device With Diffusion Barrier For Impurity Control

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Solution Overview

Problem

In three-dimensional nonvolatile memory devices, the diffusion of impurities during heat-treatment processes complicates the formation of high-density impurity regions, leading to suboptimal gate-induced drain leakage (GIDL) and reliability issues due to the polycrystalline semiconductor channel material.

Innovation Solution

A method involving the formation of a diffusion barrier between regions doped with high-density impurities and the channel, preventing impurity diffusion and allowing precise control of impurity profiles, thereby enhancing GIDL occurrence and device reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the density of impurities ion-implanted into both ends of the channel is increased to induce large amount of GIDL, then the operating speed is improved, but the impurities diffuse during heat-treatment process causing difficulty in maintaining desired impurity profile and changing threshold voltage of selection transistor

Engineering Contradiction:
Improveoperating speedVSAvoidimpurity profile control
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

A diffusion barrier layer is introduced as an intermediary between the high-density impurity region and the channel. This barrier layer prevents impurity diffusion during heat treatment while allowing the high-density impurity region to maintain its desired profile, thus resolving the contradiction between achieving high GIDL (for speed) and maintaining precise impurity control

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the density of impurities ion-implanted into both ends of the channel is increased to induce large amount of GIDL, then the operating speed is improved, but the threshold voltage of selection transistor changes degrading device reliability

Engineering Contradiction:
Improveoperating speedVSAvoiddevice reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The diffusion barrier layer acts as a mediator that isolates the high-density impurity region from the channel and selection transistor. This prevents unwanted interactions that would change threshold voltage, thereby maintaining device reliability while still enabling high-speed operation through enhanced GIDL

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If impurities are ion-implanted into both ends of the channel to form high-density regions, then GIDL is induced for faster erase operation, but the polycrystalline semiconductor channel material causes impurity diffusion during subsequent heat-treatment process

Engineering Contradiction:
Improveerase operation speedVSAvoidimpurity distribution stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The diffusion barrier layer serves as a protective intermediary that stabilizes the impurity distribution in the high-density region. It prevents the polycrystalline semiconductor channel material from causing impurity diffusion during heat treatment, thus maintaining compositional stability while enabling fast erase operations through GIDL

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention creates a localized high-density impurity region with distinct properties from the rest of the channel. By concentrating impurities in a specific region separated by a diffusion barrier, the local quality is optimized for GIDL generation without compromising the overall stability of the channel structure

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes impurity diffusion, maintains desired impurity profiles, and increases GIDL occurrence, improving the operating speed and reliability of three-dimensional nonvolatile memory devices.

Implementation Method 1

a diffusion barrier interposed between the first region and the second region

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

wells are formed by ion-implanting one type of impurities at both ends of the channel

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS8637913B2Nonvolatile memory device and method for fabricating the same
Publication Date: 2014.01.28 SK HYNIX INC
  • US8637913B2 patent drawing
  • US8637913B2 patent drawing
  • US8637913B2 patent drawing

AI summary

A nonvolatile memory device includes a channel vertically extending from a substrate and comprising a first region that is doped with first impurities and a second region that is disposed under the first region, a plurality of memory cells and a selection transistor stacked over the substrate along the channel, and a diffusion barrier interposed between the first region and the second region, wherein a density of the first impurities is higher than a density of impurities of the second region.