Nonvolatile Memory Pre-Programming and Digest Data Generation

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Solution Overview

Problem

Current nonvolatile memory devices face challenges in enhancing program performance and storage efficiency, particularly in managing multi-bit data and correcting errors due to variations in threshold voltage distributions caused by factors like program elapsed time and temperature.

Innovation Solution

The method involves pre-programming multi-bit data in multi-level cells, dividing them into state groups based on state codes to generate digest data, and programming this digest data in a separate block, which allows for efficient recovery and re-programming of target data, thereby improving program performance and storage efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-bit data is pre-programmed in multi-level cells to increase storage capacity, then storage capacity is improved, but program performance and storage efficiency deteriorate due to threshold voltage variations

Engineering Contradiction:

Improvestorage capacityVSAvoidprogram performance

Core Design Contradiction:

Quantity of substanceVSProductivity

Solution Approach 1:

The patent segments the memory block into two distinct functional parts: a pre-program block for storing multi-bit data and a digest block for storing verification data. This segmentation allows independent optimization of each block's function, enabling efficient verification of pre-programmed data without compromising program performance or storage efficiency

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by pre-programming multi-bit data into multi-level cells before final verification. The digest data is generated in advance based on the pre-programmed data, allowing for efficient error detection and correction during read operations, thereby improving overall program performance and storage efficiency

Inventive Principle:

Principle #10Preliminary action

2Quantity of substance

If multi-bit data is pre-programmed in multi-level cells to enhance storage efficiency, then storage efficiency is improved, but reliability deteriorates due to errors from threshold voltage variations

Engineering Contradiction:

Improvestorage efficiencyVSAvoiddata reliability

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where digest data is generated from pre-programmed multi-bit data and stored in the digest block. During read operations, the stored digest data is verified against newly generated digest data, providing feedback that enables error detection and correction, thereby maintaining high data reliability while preserving storage efficiency

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent applies beforehand cushioning by pre-programming verification data (digest data) along with the multi-bit data. This preparatory verification mechanism cushions against potential errors caused by threshold voltage variations, ensuring data reliability is maintained even when storing efficient multi-bit data

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS11610631B2Methods of operating nonvolatile memory devices, methods of operating storage device and storage devices

Publication Date: 2023.03.21 SAMSUNG ELECTRONICS CO LTD

AI summary

A nonvolatile memory device includes multi-level cells in a memory cell array including a plurality of memory blocks, and each of the memory blocks includes a plurality of pages. A method of operating the nonvolatile memory device includes pre-programming multi-bit data in a pre-program block of the memory blocks, dividing the multi-level cells into a plurality of state groups based on state codes indicating states of the multi-level cells to generate digest data indicating state group codes corresponding to the state groups, and programming the digest data in a digest block of the memory blocks.